XC4VFX12-11FFG668I Xilinx Inc, XC4VFX12-11FFG668I Datasheet - Page 52
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XC4VFX12-11FFG668I
Manufacturer Part Number
XC4VFX12-11FFG668I
Description
IC FPGA VIRTEX-4 FX 12K 668FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VFX12-11FFG668I
Number Of Logic Elements/cells
12312
Number Of Labs/clbs
1368
Total Ram Bits
663552
Number Of I /o
320
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
668-BBGA, FCBGA
For Use With
HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 1: Clock Resources
52
BUFIO VHDL and Verilog Templates
VHDL Template
Verilog Template
Declaring Constraints in UCF File
The following examples illustrate the instantiation of the BUFIO module in VHDL and
Verilog.
--Example BUFIO declaration
component BUFIO
port(
end component;
--Example BUFIO instantiation
U_BUFIO : BUFIO
Port map (
--Declaring constraints in VHDL file
attribute LOC : string;
attribute LOC of U_BUFIO: label is "BUFIO_X#Y#";
--where # is valid integer locations of BUFIO
//Example BUFIO module declaration
module BUFIO (O, I);
endmodule;
//Example BUFIO instantiation
BUFIO U_BUFIO (
.O(user_o),
.I(user_i)
);
// Declaring constraints in Verilog
// synthesis attribute LOC of U_BUFIO is "BUFIO_X#Y#";
// where # is valid integer locations of BUFIO
INST "U_BUFIO" LOC = BUFIO_X#Y#;
where # is valid integer locations of BUFIO
O: out std_ulogic;
I: in
);
O => user_o,
I0 => user_i
);
output O;
input I;
std_ulogic
www.xilinx.com
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
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