XC4VFX12-10FFG668I Xilinx Inc, XC4VFX12-10FFG668I Datasheet - Page 112
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XC4VFX12-10FFG668I
Manufacturer Part Number
XC4VFX12-10FFG668I
Description
IC FPGA VIRTEX-4 FX 12K 668FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VFX12-10FFG668I
Number Of Logic Elements/cells
12312
Number Of Labs/clbs
1368
Total Ram Bits
663552
Number Of I /o
320
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
668-BBGA, FCBGA
For Use With
HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4HW-AFX-FF668-400 - BOARD DEV VIRTEX 4 FF668
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC4VFX12-10FFG668I
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Chapter 3: Phase-Matched Clock Dividers (PMCDs)
112
Verilog Template
--Example PMCD instantiation
U_PMCD : PMCD
Port map (
CLKA1 => user_clka1,
);
// Example PMCD module declaration
module PMCD (CLKA1, CLKA1D2, CLKA1D4, CLKA1D8, CLKB1, CLKC1, CLKD1,
CLKA, CLKB, CLKC, CLKD, REL, RST);
endmodule;
//Example PMCD instantiation
PMCD U_PMCD (
.CLKA1(user_clka1),
.CLKA1D2(user_clka1d2),
end component;
);
output CLKA1;
output CLKA1D2;
output CLKA1D4;
output CLKA1D8;
output CLKB1;
output CLKC1;
output CLKD1;
input CLKA;
input CLKB;
input CLKC;
input CLKD;
input REL;
input RST;
parameter EN_REL = "FALSE";
parameter RST_DEASSERT_CLK = "CLKA";
CLKA
CLKB
CLKC
CLKD
REL
RST
CLKA1D2 => user_clka1d2,
CLKA1D4 => user_clka1d4,
CLKA1D8 => user_clka1d8,
CLKB1
CLKC1
CLKD1
CLKA
CLKB
CLKC
CLKD
REL
RST
=> user_clkb1,
=> user_clkc1,
=> user_clkd1,
=> user_clka,
=> user_clkb,
=> user_clkc,
=> user_clkd,
=> user_rel,
=> user_rst
: in
: in
: in
: in
: in
: in
www.xilinx.com
std_ulogic;
std_ulogic;
std_ulogic;
std_ulogic;
std_ulogic;
std_ulogic
UG070 (v2.6) December 1, 2008
Virtex-4 FPGA User Guide
R
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