XC4VFX12-10SFG363I Xilinx Inc, XC4VFX12-10SFG363I Datasheet - Page 259
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XC4VFX12-10SFG363I
Manufacturer Part Number
XC4VFX12-10SFG363I
Description
IC FPGA VIRTEX-4 FX 12K 363FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-4r
Specifications of XC4VFX12-10SFG363I
Number Of Logic Elements/cells
12312
Number Of Labs/clbs
1368
Total Ram Bits
663552
Number Of I /o
240
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
363-FBGA, FCBGA
For Use With
HW-V4-ML403-UNI-G - EVALUATION PLATFORM VIRTEX-4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC4VFX12-10SFG363I
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Virtex-4 FPGA User Guide
UG070 (v2.6) December 1, 2008
R
HSLVDCI (High-Speed Low Voltage Digitally Controlled Impedance)
The HSLVDCI standard is intended for bidirectional use. The driver is identical to LVDCI,
while the input is identical to HSTL and SSTL. By using a V
HSLVDCI allows greater input sensitivity at the receiver than when using a single-ended
LVCMOS-type receiver.
Sample circuits illustrating both unidirectional and bidirectional termination techniques
for an HSLVDCI controlled impedance driver are shown in
The DCI I/O standards supporting a controlled impedance driver with a V
input are: HSLVDCI_15, HSLVDCI_18, HSLVDCI_25, and HSLVDCI_33.
Figure 6-33: HSLVDCI Controlled Impedance Driver with Unidirectional Termination
For output DC voltage specifications, refer to the LVDCI V
Table 6-6
V
specific use conditions.
Table 6-6: HSLVDCI Input DC Voltage Specifications
Figure 6-34: HSLVDCI Controlled Impedance Driver with Bidirectional Termination
V
V
V
CCO
REF
IH
IL
R 0 = R VRN = R VRP = Z 0
are 1.5V, 1.8V, 2.5V, and 3.3V. Select V
Standard
HSLVDCI
lists the input DC voltage specifications when using HSLVDCI. Valid values of
R 0 = R VRN = R VRP = Z 0
HSLVDCI
Specific Guidelines for Virtex-4 FPGA I/O Supported Standards
www.xilinx.com
IOB
IOB
V
REF
Min
–
–
+ 0.1
Z 0
Z 0
REF
to provide the optimum noise margin in
V
V
IOB
IOB
CCO
Typ
REF
–
–
/2
OH
= V
REF
Figure 6-29
CCO
V
and V
REF
-referenced input,
/2
= V
R 0 = R VRN = R VRP = Z 0
OL
HSLVDCI
CCO
UG070_6_80_031308
+
–
entries in
and
/2
V
REF
UG070_6_81_031308
REF
HSLVDCI
Figure
Max
+
–
–
–
referenced
– 0.1
Table
6-30.
6-5.
259
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