EP3SL150F780C2N Altera, EP3SL150F780C2N Datasheet - Page 121

• Manufacturer Part Number: EP3SL150F780C2N
• Description: IC STRATIX III FPGA 150K 780FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F780C2N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 488
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix III
• Number Of Logic Blocks/elements: 142500
• # I/os (max): 488
• Frequency (max): 600MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.1V
• Logic Cells: 142500
• Ram Bits: 6543360
• Operating Supply Voltage (min): 1.05V
• Operating Supply Voltage (max): 1.15V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2405; EP3SL150F780C2NES

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–71. EP3SL150 Column Pins Input Timing Parameters (Part 3 of 3)
© July 2010 Altera Corporation
1.8-V HSTL
CLASS II
1.5-V HSTL
CLASS I
1.5-V HSTL
CLASS II
1.2-V HSTL
CLASS I
1.2-V HSTL
CLASS II
3.0-V PCI
3.0-V
PCI-X
Standard
I/O
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
PLL
PLL
PLL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
h
h
h
h
Industrial
-0.917
-1.209
-0.917
-1.209
-0.906
-1.198
-0.906
-1.198
-0.894
-1.186
-0.894
-1.186
-0.997
-1.289
1.052
1.489
1.052
1.489
1.041
1.478
1.041
1.478
1.029
1.466
1.029
1.466
1.130
1.567
Fast Model
Commercial
-0.895
-1.152
-0.895
-1.152
-0.884
-1.141
-0.884
-1.141
-0.872
-1.129
-0.872
-1.129
-0.975
-1.232
1.026
1.432
1.026
1.432
1.015
1.421
1.015
1.421
1.003
1.409
1.003
1.409
1.104
1.510
-1.309 -1.453 -1.586 -1.565 -1.896 -1.453 -1.586 -1.565 -1.896
-1.678 -1.879 -1.986 -1.910 -2.332 -1.879 -1.986 -1.910 -2.332
-1.309 -1.453 -1.586 -1.565 -1.896 -1.453 -1.586 -1.565 -1.896
-1.678 -1.879 -1.986 -1.910 -2.332 -1.879 -1.986 -1.910 -2.332
-1.298 -1.442 -1.567 -1.546 -1.877 -1.442 -1.567 -1.546 -1.877
-1.667 -1.868 -1.967 -1.891 -2.313 -1.868 -1.967 -1.891 -2.313
-1.298 -1.442 -1.567 -1.546 -1.877 -1.442 -1.567 -1.546 -1.877
-1.667 -1.868 -1.967 -1.891 -2.313 -1.868 -1.967 -1.891 -2.313
-1.288 -1.431 -1.551 -1.530 -1.861 -1.431 -1.551 -1.530 -1.861
-1.657 -1.857 -1.951 -1.875 -2.297 -1.857 -1.951 -1.875 -2.297
-1.288 -1.431 -1.551 -1.530 -1.861 -1.431 -1.551 -1.530 -1.861
-1.657 -1.857 -1.951 -1.875 -2.297 -1.857 -1.951 -1.875 -2.297
-1.401 -1.560 -1.796 -1.777 -2.105 -1.560 -1.796 -1.777 -2.105
-1.770 -1.986 -2.196 -2.122 -2.541 -1.986 -2.196 -2.122 -2.541
1.491
2.082
1.491
2.082
1.479
2.070
1.479
2.070
1.469
2.060
1.469
2.060
1.583
2.174
1.1 V
V
C2
CCL
=
1.659
2.331
1.659
2.331
1.648
2.320
1.648
2.320
1.637
2.309
1.637
2.309
1.769
2.441
1.1 V
V
C3
CCL
=
1.813
2.483
1.813
2.483
1.794
2.464
1.794
2.464
1.778
2.448
1.778
2.448
2.026
2.696
1.1 V
V
C4
CCL
=
1.782
2.384
1.782
2.384
1.763
2.365
1.763
2.365
1.747
2.349
1.747
2.349
1.995
2.597
1.1 V
V
CCL
=
C4L
2.112
2.819
2.112
2.819
2.093
2.800
2.093
2.800
2.077
2.784
2.077
2.784
2.326
3.033
0.9 V
V
CCL
Stratix III Device Handbook, Volume 2
=
1.659
2.331
1.659
2.331
1.648
2.320
1.648
2.320
1.637
2.309
1.637
2.309
1.769
2.441
1.1 V
V
I3
CCL
=
1.813
2.483
1.813
2.483
1.794
2.464
1.794
2.464
1.778
2.448
1.778
2.448
2.026
2.696
1.1 V
V
I4
CCL
=
1.782
2.384
1.782
2.384
1.763
2.365
1.763
2.365
1.747
2.349
1.747
2.349
1.995
2.597
1.1 V
V
CCL
1–121
=
I4L
2.112
2.819
2.112
2.819
2.093
2.800
2.093
2.800
2.077
2.784
2.077
2.784
2.326
3.033
0.9 V
V
CCL
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns