EP1SGX40GF1020C7N Altera, EP1SGX40GF1020C7N Datasheet - Page 44
EP1SGX40GF1020C7N
Manufacturer Part Number
EP1SGX40GF1020C7N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40GF1020C7N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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2–34
Stratix GX Device Handbook, Volume 1
Figure 2–29. EP1SGX25 Receiver PLL Recovered Clock to Fast Regional Clock
Connection
In the EP1SGX40 device, the receiver PLL recovered clocks from
transceivers 0 and 1 drive RCLK[1..0] while transceivers 2, 3, and 4
drive RCLK[7..6]. The regional clocks feed logic in their associated
regions.
PLD
FCLK[1..0]
FCLK[1..0]
Transceiver Blocks
Stratix GX
Block 0
Block 1
Block 2
Block 3
Altera Corporation
June 2006
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