EPF10K130EQI240-2 Altera, EPF10K130EQI240-2 Datasheet - Page 19

IC FLEX 10KE FPGA 130K 240-PQFP

EPF10K130EQI240-2

Manufacturer Part Number
EPF10K130EQI240-2
Description
IC FLEX 10KE FPGA 130K 240-PQFP
Manufacturer
Altera
Series
FLEX-10KE®r
Datasheet

Specifications of EPF10K130EQI240-2

Number Of Logic Elements/cells
6656
Number Of Labs/clbs
832
Total Ram Bits
65536
Number Of I /o
186
Number Of Gates
342000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 10KE
Number Of Usable Gates
130000
Number Of Logic Blocks/elements
6656
# Registers
186
# I/os (max)
186
Frequency (max)
333.33MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
6656
Ram Bits
65536
Device System Gates
342000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2206

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPF10K130EQI240-2
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EPF10K130EQI240-2
Manufacturer:
ALTERA
0
Part Number:
EPF10K130EQI240-2
Manufacturer:
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Quantity:
20 000
Part Number:
EPF10K130EQI240-2N
Manufacturer:
ALTERA
0
Altera Corporation
Figure 9
with the carry chain. One portion of the LUT generates the sum of two bits
using the input signals and the carry-in signal; the sum is routed to the
output of the LE. The register can be bypassed for simple adders or used
for an accumulator function. Another portion of the LUT and the carry
chain logic generates the carry-out signal, which is routed directly to the
carry-in signal of the next-higher-order bit. The final carry-out signal is
routed to an LE, where it can be used as a general-purpose signal.
Figure 9. FLEX 10KE Carry Chain Operation (n-Bit Full Adder)
an
bn
a1
b1
a2
b2
Carry-In
shows how an n-bit full adder can be implemented in n + 1 LEs
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Carry Chain
Carry Chain
Carry Chain
Carry Chain
LUT
LUT
LUT
LUT
Register
Register
Register
Register
LEn + 1
LEn
LE1
LE2
sn
Carry-Out
s1
s2
19

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