EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 547
EP2AGX65DF29C6N
Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX65DF29C6N.pdf
(306 pages)
Specifications of EP2AGX65DF29C6N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29C6N
Manufacturer:
ST
Quantity:
12 000
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Chapter 2: Transceiver Clocking in Arria II Devices
FPGA Fabric PLL-Transceiver PLL Cascading
December 2010 Altera Corporation
The dedicated PLL cascade networks are segmented by bidirectional tri-state buffers
located along the clock line. Segmentation of the dedicated PLL cascade network
allows two left PLLs to drive the cascade clock line simultaneously to provide the
input reference clock to the CMU PLLs and receiver CDRs in different transceiver
blocks.
The following sections describe the dedicated PLL cascade networks available in the
Arria II GX device family.
The FPGA fabric PLLs-transceiver PLLs cascading option is available in the following
Arria II GX devices with four channels:
■
■
Figure 2–31
in the EP2AGX45CU17 and EP2AGX65CU17 devices.
Figure 2–31. FPGA Fabric PLLs-Transceiver PLLs Cascading Option Allowed in the
EP2AGX45CU17 and EP2AGX65CU17 Devices
The FPGA fabric PLLs-transceiver PLLs cascading option is available in the following
Arria II GX devices with eight channels:
■
■
■
■
■
■
EP2AGX45CU17
EP2AGX65CU17
EP2AGX45DF25
EP2AGX45DF29
EP2AGX65DF25
EP2AGX45DF29
EP2AGX95DF25
EP2AGX125DF25
shows the FPGA fabric PLLs-transceiver PLLs cascading option allowed
Channel 3
Channel 2
Channel 1
Channel 0
Transceiver Block GXBL0
CMU 1
CMU 0
PLL
PLL
CDR
CDR
CDR
CDR
Cascade
Network
PLL
Arria II Device Handbook Volume 2: Transceivers
PLL_1
PLL_4
EP2AGX45CU17
EP2AGX65CU17
2–57
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