EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 500

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

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Arria II Device Handbook Volume 2: Transceivers
1
Bonded Channel Configurations
Arria II GX and GZ devices support ×4 PCS and PMA channel bonding that allows
bonding of four channels within the same transceiver block. These devices also
support ×8 channel bonding in PCIe and Basic modes that allows bonding of eight
PCS and PMA channels across two transceiver blocks on the same side of the device.
Arria II GX and GZ devices with at least two transceiver blocks support ×8 bonding.
×4 Bonded Channel Configurations
The following functional modes support ×4 bonded transmitter channel
configuration:
■
■
■
■
Figure 2–6
configurations.
The Quartus II Compiler generates an error if you do not make the following
assignments:
■
■
■
■
PCIe ×4—Gen1 and Gen2 (Gen2 for Arria II GZ only)
XAUI
CPRI ×4/OBSAI ×4
Basic ×4
tx_dataout[0] of the ×4 bonded link (XAUI or PCIe ×4) to physical channel 0 of
the transceiver block
tx_dataout[1] to physical channel 1 of the transceiver block
tx_dataout[2] to physical channel 2 of the transceiver block
tx_dataout[3] to physical channel 3 of the transceiver block
shows the transmitter channel datapath clocking in ×4 channel bonding
Chapter 2: Transceiver Clocking in Arria II Devices
Transceiver Channel Datapath Clocking
December 2010 Altera Corporation