EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 373

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 12: Power Management in Arria II Devices
Hot Socketing
December 2010 Altera Corporation
Hot-Socketing Feature Implementation
1
Arria II devices are immune to latch-up when using the hot-socketing feature. The
hot-socketing feature turns off the output buffer during power up and power down of
the V
circuitry generates an internal HOTSCKT signal when the V
supplies for Arria II GX devices are below the threshold voltage.
The hot-socketing feature turns off the output buffer during power up and power
down of the V
To support power-up sequence for all Arria II GZ devices, fully power V
V
Hot-socketing circuitry is designed to prevent excess I/O leakage during power up.
When the voltage ramps up very slowly, it is still relatively low, even after the POR
signal is released and the configuration is completed. The CONF_DONE, nCEO, and
nSTATUS pins fail to respond, as the output buffer cannot flip from the state set by the
hot-socketing circuit at this low voltage. Therefore, the hot-socketing circuit is
removed on these configuration pins to ensure that they are able to operate during
configuration. Thus, it is the expected behavior for these pins to drive out during
power-up and power-down sequences.
Altera uses GND as reference for hot-socketing operation and I/O buffer designs. To
ensure proper operation, Altera recommends connecting the GND between boards
before connecting to the power supplies. This prevents the GND on your board from
being pulled up inadvertently by a path to power through other components on your
board. A pulled up GND can otherwise cause an out-of-specification I/O voltage or
current condition with the Altera
CCAUX
CC
, V
begins to ramp.
CCIO
CC
, or V
, V
CCIO
CCPD
, V
power supplies for Arria II GX devices. Hot-socketing
CCPD
, and V
®
device.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
CCPGM
power supplies for Arria II GZ devices.
CC
, V
CCIO
, or V
CCPD
CC
before
power
12–5