EP3C16F484C8N Altera, EP3C16F484C8N Datasheet - Page 194
![IC CYCLONE III FPGA 16K 484FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP3C16F484C8N
Manufacturer Part Number
EP3C16F484C8N
Description
IC CYCLONE III FPGA 16K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10M164C8N.pdf
(350 pages)
7.EP3C16F484C8N.pdf
(274 pages)
Specifications of EP3C16F484C8N
Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
346
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
15408
# I/os (max)
346
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
15408
Ram Bits
516096
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
963
Family Type
Cyclone III
No. Of I/o's
346
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2474
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA
Quantity:
331
Company:
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA44
Quantity:
120
Part Number:
EP3C16F484C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
9–34
PS Configuration
Cyclone III Device Handbook, Volume 1
f
1
Figure 9–13. Configuration Boot Address in AP Flash Memory Map
Note to
(1) The default configuration boot address is x010000 when represented in 16-bit word addressing.
You can perform PS configuration on Cyclone III device family with an external
intelligent host, such as a MAX II device, microprocessor with flash memory, or a
download cable. In the PS scheme, an external host controls the configuration.
Configuration data is clocked into the target Cyclone III device family using the
DATA[0] pin at each rising edge of DCLK.
If your system already contains a common flash interface (CFI) flash memory, you can
use it for the Cyclone III device family configuration storage as well. The MAX II PFL
feature provides an efficient method to program CFI flash memory devices through
the JTAG interface and provides the logic to control the configuration from the flash
memory device to the Cyclone III device family. Both PS and FPP configuration
schemes are supported using the PFL feature.
For more information about the PFL, refer to
with the Quartus II
Cyclone III device family does not support enhanced configuration devices for PS or
FPP configurations.
Figure
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
9–13:
Cyclone III
Address
x00FFFF
x000000
Default
Boot
Software.
Bottom Parameter Flash Memory
bit[15]
Other data/code
parameter area
Configuration
16-bit word
128-Kbit
Data
bit[0]
x010000 (1)
AN 386: Using the Parallel Flash Loader
Cyclone III
Address
x00FFFF
x000000
Default
Boot
bit[15]
Top Parameter Flash Memory
© December 2009 Altera Corporation
parameter area
Other data/code
Other data/code
Configuration
16-bit word
128-Kbit
Data
Configuration Features
bit[0]