EP2C8F256C6 Altera, EP2C8F256C6 Datasheet - Page 88
![IC CYCLONE II FPGA 8K 256-FBGA](/photos/6/70/67063/544-256-fbga_sml.jpg)
EP2C8F256C6
Manufacturer Part Number
EP2C8F256C6
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C8F256C6
Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2148
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C8F256C6
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C8F256C6N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EP2C8F256C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Power-On Reset Circuitry
4–6
Cyclone II Device Handbook, Volume 1
For Cyclone II devices, wake-up time consists of power-up, POR,
configuration, and initialization. The device must properly go through all
four stages to configure correctly and begin operation. You can calculate
wake-up time using the following equation:
Figure 4–3
Figure 4–3. Cyclone II Wake-Up Time
Note to
(1)
The V
characteristics and the power supply used in your system. The fast-on
devices require a maximum V
POR time of 12 ms.
Configuration time will depend on the configuration mode chosen and
the configuration file size. You can calculate configuration time by
multiplying the number of bits in the configuration file with the period of
the configuration clock. For fast configuration times, you should use
Passive Serial (PS) configuration mode with maximum DCLK frequency
of 100 MHz. In addition, you can use compression to reduce the
configuration file size and speed up the configuration time. The t
or t
1
Wake-Up Time = V
V
CC
Minimum
CD2UMC
V
CC
CC
Figure
ramp must be monotonic.
ramp time and POR time will depend on the device
For more information on the t
to the Configuring Cyclone II Devices chapter in the Cyclone II
Device Handbook.
illustrates the components of wake up time.
parameters will determine the initialization time.
Voltage
V
CC
Time
4–3:
Ramp
CC
Ramp Time + POR Time + Configuration Time + Initialization Time
POR Time
CC
ramp time of 2 ms and have a maximum
Configuration Time
CD2UM
or t
CD2UMC
Altera Corporation
parameters, refer
Initialization
Time
February 2007
CD2UM
Mode
User
Time