EP2C8F256C6 Altera, EP2C8F256C6 Datasheet - Page 48
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EP2C8F256C6
Manufacturer Part Number
EP2C8F256C6
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C8F256C6
Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2148
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP2C8F256C6
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C8F256C6N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EP2C8F256C6N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Embedded Multipliers
Figure 2–19. Embedded Multiplier LAB Row Interface
2–36
Cyclone II Device Handbook, Volume 1
Interconect Region
LAB Block
C4 Interconnects
LAB
Embedded Multiplier
to LAB Row Interface
Block Interconnect Region
Direct Link Interconnect
from Adjacent LAB
16
Embedded Multiplier Routing Interface
The R4, C4, and direct link interconnects from adjacent LABs drive the
embedded multiplier row interface interconnect. The embedded
multipliers can communicate with LABs on either the left or right side
through these row resources or with LAB columns on either the right or
left with the column resources. Up to 16 direct link input connections to
the embedded multiplier are possible from the left adjacent LABs and
another 16 possible from the right adjacent LAB. Embedded multiplier
outputs can also connect to left and right LABs through 18 direct link
interconnects each.
array interface.
Row Interface
36
5
Block
36 Inputs per Row
Figure 2–19
R4 Interconnects
18
16
18
Control
[35..0]
Embedded Multiplier
shows the embedded multiplier to logic
36 Outputs per Row
[35..0]
18 Direct Link Outputs
to Adjacent LABs
36
C4 Interconnects
18
18
Altera Corporation
Interconect Region
Direct Link Interconnect
from Adjacent LAB
LAB Block
February 2007
LAB