EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 86

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

4–6
Figure 4–4. Stratix III Address Clock Enable during Read Cycle Waveform
Stratix III Device Handbook, Volume 1
latched address
(inside memory)
addressstall
q (asynch)
rdaddress
Figure 4–3
referred to by the port name addressstall.
Figure 4–3. Stratix III Address Clock Enable Block Diagram
Figure 4–4
q (synch)
inclock
rden
doutn-1
doutn
an
shows an address clock enable block diagram. The address clock enable is
shows the address clock enable waveform during the read cycle.
a0
doutn
addressstall
address[0]
address[N]
a0
dout0
a1
clock
dout0
a2
Chapter 4: TriMatrix Embedded Memory Blocks in Stratix III Devices
1
0
1
0
a1
dout1
a3
dout1
address[0]
address[N]
register
register
a4
a4
dout4
a5
address[0]
address[N]
© May 2009 Altera Corporation
dout4
a5
dout5
a6
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