EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 337

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 11: Configuring Stratix III Devices
Configuration Features
© March 2011 Altera Corporation
Figure 11–1. Enabling Compression for Stratix III Bitstreams in Compiler Settings
You can also enable compression when creating programming files from the Convert
Programming Files window.
1. On the File menu, click Convert Programming Files.
2. In the (.pof, .sram, .hex, .rbf, or .ttf) list, select the programming file type.
3. For POF output files, select a configuration device from (.pof, .sram, .hex, .rbf, or
4. Under Input files to convert, select SOF Data.
5. Select Add File and add a Stratix III device SOF or SOFs.
6. Select the name of the file you added to the SOF Data area and click Properties.
7. Check the Compression check box.
When multiple Stratix III devices are cascaded, you can selectively enable the
compression feature for each device in the chain if you are using a serial configuration
scheme.
has compression enabled, and receives a compressed bitstream from the configuration
device. The second Stratix III device has the compression feature disabled, and
receives uncompressed data.
In a multi-device FPP configuration chain (with a MAX II device/microprocessor +
flash), all Stratix III devices in the chain must either enable or disable the
decompression feature. You cannot selectively enable the compression feature for
each device in the chain because of the DATA and DCLK relationship.
.ttf).
Figure 11–2
shows a chain of two Stratix III devices. The first Stratix III device
Stratix III Device Handbook, Volume 1
11–5