EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 299

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 9: High-Speed Differential I/O Interfaces and DPA in Stratix III Devices
Differential Transmitter
© July 2010
Altera Corporation
Figure 9–2. Transmitter Block Diagram for Stratix III Devices
You can configure any Stratix III transmitter data channel to generate a
source-synchronous transmitter clock output. This flexibility allows placing the
output clock near the data outputs to simplify board layout and reduce clock-to-data
skew. Different applications often require specific clock-to-data alignments or specific
data rate-to-clock rate factors. The transmitter can output a clock signal at the same
rate as the data with a maximum frequency of 800 MHz. You can also divide the
output clock by a factor of 2, 4, 8, or 10, depending on the serialization factor. The
phase of the clock in relation to the data can be set at 0° or 180° (edge or center
aligned). The left and right PLLs (PLL_Lx/PLL_Rx) provide additional support for
other phase shifts in 45° increments. These settings are statically made in the
MegaWizard
Figure 9–3
Figure 9–3. Transmitter in Clock Output Mode for Stratix III Devices
shows the Stratix III transmitter in clock output mode.
Internal
®
Logic
Plug-In Manager in the Quartus II software.
Internal
Logic
PLL_Lx /
PLL_Lx /
PLL_Rx
PLL_Rx
10
Parallel
Transmitter Circuit
load_en
load_en
diffioclk
diffioclk
Series
Serializer
Stratix III Device Handbook, Volume 1
TX_OUT
Txclkout+
Txclkout–
9–5