EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 272
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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8–24
Stratix III Device Handbook, Volume 1
Table 8–7. DLL Reference Clock Input for EP3SE80, EP3SE110, and EP3SL150 Devices in the
780-pin Package
Table 8–8. DLL Reference Clock Input for EP3SE80, EP3SE110, EP3SL110, and EP3SL150 Devices
in the 1152-pin Package
DLL0
DLL1
DLL2
DLL3
DLL0
DLL1
DLL2
DLL3
DLL
DLL
(Top/Bottom)
(Top/Bottom)
CLK12P
CLK13P
CLK14P
CLK15P
CLK12P
CLK13P
CLK14P
CLK15P
CLK12P
CLK13P
CLK14P
CLK15P
CLK12P
CLK13P
CLK14P
CLK15P
CLK4P
CLK5P
CLK6P
CLK7P
CLK4P
CLK5P
CLK6P
CLK7P
CLK4P
CLK5P
CLK6P
CLK7P
CLK4P
CLK5P
CLK6P
CLK7P
CLKIN
CLKIN
(Left/Right)
(Left/Right)
CLK10P
CLK11P
CLK10P
CLK11P
CLK10P
CLK11P
CLK10P
CLK11P
CLK0P
CLK1P
CLK2P
CLK3P
CLK0P
CLK1P
CLK2P
CLK3P
CLK8P
CLK9P
CLK8P
CLK9P
CLK0P
CLK1P
CLK2P
CLK3P
CLK0P
CLK1P
CLK2P
CLK3P
CLK8P
CLK9P
CLK8P
CLK9P
CLKIN
CLKIN
Chapter 8: External Memory Interfaces in Stratix III Devices
PLL (Top/Bottom)
Stratix III External Memory Interface Features
(Top/Bottom)
PLL_T1
PLL_B1
PLL_T1
PLL_B1
PLL_B2
PLL_T2
PLL
—
—
© March 2010 Altera Corporation
PLL (Left/Right)
(Left/Right)
PLL_R1
PLL_R3
PLL_R2
PLL_L2
PLL_L2
PLL_L3
PLL
—
—
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