EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 255
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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Chapter 8: External Memory Interfaces in Stratix III Devices
Memory Interfaces Pin Support
Table 8–2. Number of DQS/DQ Groups in Stratix III Devices per Side (Part 2 of 2)
© March 2010 Altera Corporation
EP3SL340
Notes to
(1) Some of the ×4 groups may use configuration or RUP/RDN pins. You cannot use these ×4 groups if the pins are used for configuration or as
(2) To interface with a ×36 QDR II+/QDR II SRAM device in a Stratix III FPGA that does not support the ×32/×36 DQS/DQ group, refer to the
RUP and RDN pins for OCT calibration.
Pin, and Board Layout Guidelines
Device
Table
8–2:
1152-pin Hybrid FineLine BGA
1517-pin FineLine BGA
1760-pin FineLine BGA
in volume 2 of the External Memory Interface Handbook.
Package
Left/ Right
Left/ Right
Left/ Right
Bottom
Bottom
Bottom
Side
Top/
Top/
Top/
×4
26
26
34
38
40
44
(1)
×8/×9
12
12
16
18
18
22
Stratix III Device Handbook, Volume 1
×16/×18
10
4
6
6
4
8
×32/×36
0
0
0
4
0
4
Device,
8–7
(2)
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