EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 232

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

7–28
Figure 7–14. OCT Calibration Block (CB) Location in EP3SL110, EP3SL150, EP3SE80, and EP3SE110 Devices
Note to
(1)
Figure 7–15. OCT Calibration Block (CB) Location in EP3SL200, EP3SE260 and EP3SL340
Note to
(1)
Stratix III Device Handbook, Volume 1
Figure 7–14
Figure 7–15
Figure
Figure
CB 1
CB 0
7–14:
7–15:
CB 0
CB 1
is a top view of the silicon die that corresponds to a reverse view for flip chip packages. It is a graphical representation only.
is a top view of the silicon die that corresponds to a reverse view for flip chip packages. It is a graphical representation only.
Bank 2A
Bank 1A
Bank 1C
Bank 2C
Bank 1B
Bank 1C
Bank 2C
Bank 2B
Bank 1A
Bank 2A
EP3SL110
EP3SL150
EP3SE80
EP3SE110
EP3SL200
EP3SE260
EP3SL340
Bank 6B
Bank 6C
Bank 5C
Bank 5B
Bank 5A
Bank 6A
Bank 6A
Bank 6C
Bank 5C
Bank 5A
CB 5
CB 6
CB 6
CB 5
Chapter 7: Stratix III Device I/O Features
(Note 1)
I/O bank with OCT
calibration block
I/O bank without OCT
calibration block
© July 2010 Altera Corporation
I/O bank with OCT
calibration block
I/O bank without OCT
calibration block
OCT Calibration
(Note 1)