EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 208
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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7–4
Table 7–2. I/O Standards and Voltage Levels for Stratix III Devices
Stratix III Device Handbook, Volume 1
Differential
SSTL-2 Class I
Differential
SSTL-2 Class II
Differential
SSTL-18 Class I
Differential
SSTL-18 Class II
Differential
SSTL-15 Class I
Differential
SSTL-15 Class II
Differential
HSTL-18 Class I
Differential
HSTL-18 Class II
Differential
HSTL-15 Class I
Differential
HSTL-15 Class II
Differential
HSTL-12 Class I
Differential
HSTL-12 Class II
LVDS (6),
RSDS (6), (7),
mini-LVDS (6),
(7),
I/O Standard
(8)
(8)
(8)
JESD8-16A
JESD8-16A
JESD8-9B
JESD8-9B
JESD8-15
JESD8-15
ANSI/TIA/
Standard
JESD8-6
JESD8-6
JESD8-6
JESD8-6
Support
EIA-644
—
—
—
—
Column I/O
Banks
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Input Operation
Row I/O
Banks
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
V
CCIO
(V)
Output Operation
Column
Banks
(Note
2.5
2.5
1.8
1.8
1.5
1.5
1.8
1.8
1.5
1.5
1.2
1.2
2.5
2.5
2.5
I/O
1),
Row I/O
(3)
Banks
2.5
2.5
1.8
1.8
1.5
1.8
1.8
1.5
1.2
2.5
2.5
2.5
—
—
—
(Part 2 of 3)
Voltage)
V
Driver
Chapter 7: Stratix III Device I/O Features
C CP D
(Pre-
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
(V)
© July 2010 Altera Corporation
Stratix III I/O Standards Support
Voltage)
V
(Input
REF
Ref
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(V)
V
Termination
TT
Voltage)
(V) (Board
1.25
1.25
0.90
0.90
0.75
0.75
0.90
0.90
0.75
0.75
0.60
0.60
—
—
—
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