EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 139

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

Chapter 5: DSP Blocks in Stratix III Devices
Operational Mode Descriptions
Figure 5–21. Round and Saturation Locations
© March 2010 Altera Corporation
16 User defined SAT Positions (bit 43-28)
43
43
1
42
42
Stratix III devices have up to 16 configurable bit positions out of the 44-bit bus
([43:0]) for the round and saturate logic unit providing higher flexibility. You must
select the 16 configurable bit positions at compile time. These 16-bit positions are
located at bits [21:6] for rounding and [43:28] for saturation, as shown in
Figure
For symmetric saturation, the RND bit position is also used to determine where the
LSP for the saturated data is located.
You can use the rounding and saturation function described above in regular
supported multiplication operations as specified in
accumulation type operations, the following convention is used.
The functionality of the round logic unit is in the format of:
Result = RND[S(A × B)], when used for an accumulation type of operation.
Likewise, the functionality of the saturation logic unit is in the format of:
Result = SAT[S(A × B)], when used for an accumulation type of operation.
If both the round and saturation logic units are used for an accumulation type of
operation, the format is:
Result = SAT[RND[S(A × B)]]
5–21.
29
28
16 User defined RND Positions (bit 21-6)
21
20
Table
7
6
5–2. However, for
Stratix III Device Handbook, Volume 1
1
0
0
5–33