EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 104
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
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Power Management
Programming File Compatibility
Conclusion
Stratix III Device Handbook, Volume 1
f
Stratix III memory block clock-enables allow you to control clocking of each memory
block to reduce AC power consumption. Use the read-enable signal to ensure that
read operations only occur when you need them to. If your design does not require
read-during-write, you can reduce your power consumption by de-asserting the
read-enable signal during write operations, or any period when no memory
operations occur.
The Quartus II software automatically places any unused memory blocks in low
power mode to reduce static power.
Beginning with version 8.1, the Quartus II software supports the logic option
STRATIXIII_MRAM_COMPATIBILITY. When this option is set to on, the Quartus II
software will generate programming files compatible with both affected and fixed
silicons (for write speed decrease in M144K blocks). The default setting for this option
is on.
For the list of devices that is affected by the write speed decrease for M144K blocks
refer to the
To set the STRATIXIII_MRAM_COMPATIBILITY variable, enter the following line
in the Quartus Settings File:
set_global_assignment –name STRATIXIII_MRAM_COMPATIBILITY ON
When targeting fixed silicon devices, set the STRATIXIII_MRAM_COMPATIBILITY
variable to OFF. When the STRATIXIII_MRAM_COMPATIBILITY option is set to
OFF, you will be able to achieve the higher F
fixed silicons and the programming files will only be compatible with fixed silicons.
These programming files will not configure other silicon revisions. The nSTATUS pin
will drive out low and configuration will fail.
The Stratix III TriMatrix embedded memory structure provides three different on-chip
RAM block sizes to address your design needs. All memory blocks are fully
customizable and can be cascaded to implement wider or deeper memories with
minimal speed penalty.
You can independently configure each embedded memory block to be a single- or
dual-port RAM, FIFO, ROM, or shift register via the Quartus II MegaWizard Plug-In
Manager software.
Stratix III Device Family Errata
Chapter 4: TriMatrix Embedded Memory Blocks in Stratix III Devices
Sheet.
MAX
that is published for M144K blocks in
© May 2009 Altera Corporation
Conclusion
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