EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 8
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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1–8
Table 1–9. On-Chip Termination Variation after Power-up Calibration
Stratix III Device Handbook, Volume 2
dR/dV
dR/dT
Note to
(1) Valid for V
Symbol
Table
1–9:
CCIO
OCT variation with voltage without re-calibration
OCT variation with temperature without re-calibration
range of ± 5% and temperature range of 0° to 85° C.
Pin Capacitance
Table 1–10
s
Table 1–10. Pin Capacitance for Stratix III Device Family
Hot-Socketing
Table 1–11
Table 1–11. Hot-Socketing Specifications for Stratix III Devices
Note to
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |I
C
CLK1
capacitance and dv/dt is the slew rate.
, C
Symbol
Table
CLK3
C
C
C
C
C
C
CLKTB
CLKLR
OUTFB
CLK10
IOTB
IOLR
, C
|I
|I
lists the hot-socketing specifications for Stratix III devices.
lists the Stratix III device family pin capacitance.
Description
Symbol
IOPIN
IOPIN
1–11:
CLK8
|(DC)
|(AC)
, and
Input capacitance on top and bottom I/O pins
Input capacitance on left and right I/O pins
Input capacitance on top and bottom
non-dedicated clock input pins
Input capacitance on left and right
non-dedicated clock input pins
Input capacitance on dual-purpose clock
output and feedback pins
Input capacitance for dedicated clock input
pins
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
DC current per I/O pin
AC current per I/O pin
Parameter
Parameter
(Note 1)
V
CCIO
2.5
1.8
1.5
1.2
2.5
1.8
1.5
1.2
3
3
(V)
IOPIN
| = C dv/dt, in which C is I/O pin
Commercial
Typical
© July 2010 Altera Corporation
0.029
0.036
0.065
0.104
0.177
0.294
0.301
0.355
0.344
0.348
Typical
4
4
4
4
5
2
Maximum
Electrical Characteristics
8 mA
300 A
Unit
pF
pF
pF
pF
pF
pF
(1)
%/mV
%/mV
%/mV
%/mV
%/mV
%/°C
%/°C
%/°C
%/°C
%/°C
Unit
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