EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 300

• Manufacturer Part Number: EP3SL150F1152C3N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C3N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2408; EP3SL150F1152C3NES

1–300
Table 1–135. EP3SE260 Column Pins Input Timing Parameters (Part 3 of 3)
Table 1–136. EP3SE260 Row Pins Input Timing Parameters (Part 1 of 3)
Stratix III Device Handbook, Volume 2
DIFFERENTIAL
2.5-V SSTL
CLASS I
DIFFERENTIAL
2.5-V SSTL
CLASS II
LVDS
MINI-LVDS
RSDS
DIFFERENTIAL
1.2-V
HSTL CLASS I
DIFFERENTIAL
1.2-V
HSTL CLASS II
I/O Standard
I/O Standard
Clock
GCLK
GCLK
GCLK
GCLK
Clock
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
PLL
PLL
PLL
PLL
PLL
PLL
PLL
Table 1–136
standards.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
t
t
t
t
t
t
t
t
t
t
h
h
h
h
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
Industrial
Industrial
-1.153
-0.824
-1.161
-0.816
1.289
1.103
1.297
1.095
-1.332
-0.581
-1.332
-0.581
-1.332
-0.581
-1.137
-0.783
-1.137
-0.783
1.476
0.869
1.476
0.869
1.476
0.869
1.274
1.064
1.274
1.064
Fast Model
Fast Model
lists the EP3SE260 row pins input timing parameters for differential I/O
Commercial
Commercial
-1.221
-0.821
-1.233
-0.809
1.376
1.122
1.388
1.110
-1.401
-0.578
-1.401
-0.578
-1.401
-0.578
-1.216
-0.772
-1.216
-0.772
1.563
0.886
1.563
0.886
1.563
0.886
1.369
1.071
1.369
1.071
-1.879 -1.911 -2.067 -1.987 -2.459 -1.928 -2.084 -1.987 -2.459
-1.403 -1.493 -1.659 -1.580 -1.562 -1.493 -1.659 -1.580 -1.562
-1.889 -1.922 -2.083 -2.003 -2.475 -1.939 -2.099 -2.003 -2.475
-1.393 -1.482 -1.643 -1.564 -1.546 -1.482 -1.644 -1.564 -1.546
2.114
1.882
2.124
1.872
-1.719 -1.648 -1.841 -1.769 -2.221 -1.630 -1.815 -1.769 -2.221
-1.475 -1.662 -1.803 -1.711 -1.711 -1.692 -1.839 -1.711 -1.711
-1.719 -1.648 -1.841 -1.769 -2.221 -1.630 -1.815 -1.769 -2.221
-1.475 -1.662 -1.803 -1.711 -1.711 -1.692 -1.839 -1.711 -1.711
-1.719 -1.648 -1.841 -1.769 -2.221 -1.630 -1.815 -1.769 -2.221
-1.475 -1.662 -1.803 -1.711 -1.711 -1.692 -1.839 -1.711 -1.711
-1.849 -1.877 -2.030 -1.953 -2.400 -1.901 -2.052 -1.953 -2.400
-1.384 -1.483 -1.663 -1.576 -1.581 -1.474 -1.654 -1.576 -1.581
-1.849 -1.877 -2.030 -1.953 -2.400 -1.901 -2.052 -1.953 -2.400
-1.384 -1.483 -1.663 -1.576 -1.581 -1.474 -1.654 -1.576 -1.581
1.1 V
V
1.994
1.991
1.994
1.991
1.994
1.991
2.088
1.866
2.088
1.866
1.1 V
V
C2
CCL
C2
CCL
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
=
=
2.150
1.986
2.161
1.975
1.1 V
1.939
2.205
1.939
2.205
1.939
2.205
2.122
1.981
2.122
1.981
V
1.1 V
V
C3
CCL
C3
CCL
=
=
2.330
2.207
2.346
2.191
2.157
2.405
2.157
2.405
2.157
2.405
2.297
2.216
2.297
2.216
1.1 V
V
1.1 V
V
C4
CCL
C4
CCL
=
=
2.237
2.099
2.253
2.083
2.071
2.282
2.071
2.282
2.071
2.282
2.206
2.098
2.206
2.098
1.1 V
V
1.1 V
V
CCL
CCL
=
=
C4L
C4L
2.711
2.096
2.727
2.080
2.526
2.297
2.526
2.297
2.526
2.297
2.656
2.118
2.656
2.118
0.9 V
0.9 V
V
V
CCL
CCL
=
=
© July 2010 Altera Corporation
1.934
2.252
1.934
2.252
1.934
2.252
2.156
1.985
2.156
1.985
2.177
1.998
2.188
1.987
1.1 V
1.1 V
V
V
CCL
CCL
I3
I3
=
=
2.145
2.458
2.145
2.458
2.145
2.458
2.330
2.221
2.330
2.221
2.355
2.217
2.370
2.202
1.1 V
1.1 V
V
V
I4
CCL
I4
CCL
=
=
I/O Timing
2.071
2.282
2.071
2.282
2.071
2.282
2.206
2.098
2.206
2.098
2.237
2.099
2.253
2.083
1.1 V
V
1.1 V
V
CCL
CCL
=
=
I4L
I4L
2.526
2.297
2.526
2.297
2.526
2.297
2.656
2.118
2.656
2.118
2.711
2.096
2.727
2.080
0.9 V
V
0.9 V
V
CCL
CCL
=
=
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns