EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 3
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C3N
Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C3N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES
EP3SL150F1152C3NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3SL150F1152C3N
Manufacturer:
ALTERA
Quantity:
490
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Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
Electrical Characteristics
Table 1–3. Recommended Operating Conditions for Stratix III Devices (Part 1 of 2)
© July 2010 Altera Corporation
V
V
V
V
V
CCL
CC
CCD_PLL
CCA_PLL
CCPT
Symbol
Selectable core voltage power supply for
internal logic and input buffers
Selectable core voltage power supply for
internal logic and input buffers
I/O registers power supply
PLL digital power supply
PLL analog power supply
Power supply for the programmable power
technology
Table 1–2. Maximum Allowed Overshoot During Transitions
Recommended Operating Conditions
This section lists the functional operation limits for AC and DC parameters for
Stratix III devices.
from Stratix III devices. All supplies are required to monotonically reach their full-rail
values within t
Vi (AC)
Note to
(1) This input voltage is regardless of the V
Symbol
Parameter
Table
1–2:
RAMP
AC Input Voltage
Table 1–3
.
Parameter
lists the steady-state voltage and current values expected
(1)
CCIO
Conditions
supply which is used to power up the input buffer.
—
—
—
—
—
—
Condition
4.05
4.15
4.25
4.35
4.45
4.55
4.65
4.75
4.85
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4
Minimum
2.375
2.375
1.05
0.86
1.05
1.05
Overshoot Duration as a % of
Stratix III Device Handbook, Volume 2
High Time
100.000
Typical
79.330
46.270
27.030
15.800
9.240
5.410
3.160
1.850
1.080
0.630
0.370
0.220
0.130
0.074
0.043
0.025
0.015
1.1
0.9
1.1
1.1
2.5
2.5
Maximum
2.625
2.625
1.15
0.94
1.15
1.15
Unit
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
Unit
V
V
V
V
V
V
1–3
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