EP3SL150F780C4N Altera, EP3SL150F780C4N Datasheet - Page 124

• Manufacturer Part Number: EP3SL150F780C4N
• Description: IC STRATIX III FPGA 150K 780FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F780C4N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 488
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Stratix III
• Number Of Logic Blocks/elements: 142500
• # I/os (max): 488
• Frequency (max): 450MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.1V
• Logic Cells: 142500
• Ram Bits: 6543360
• Operating Supply Voltage (min): 1.05V
• Operating Supply Voltage (max): 1.15V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2403; EP3SL150F780C4NES

5–18
36-Bit Multiplier
Figure 5–11. 36-Bit Independent Multiplier Mode for Half-DSP Block
Stratix III Device Handbook, Volume 1
dataa_0[35..18]
datab_0[35..18]
datab_0[35..18]
dataa_0[35..18]
datab_0[17..0]
dataa_0[17..0]
dataa_0[17..0]
datab_0[17..0]
clock[3..0]
ena[3..0]
aclr[3..0]
You can efficiently construct a 36 × 36 multiplier using four 18 × 18 multipliers. This
simplification fits conveniently into one half-DSP block, and is implemented in the
DSP block automatically by selecting the 36 × 36 mode. Stratix III devices can have up
to two 36-bit multipliers per DSP block (one 36-bit multiplier per half DSP block). The
36-bit multiplier is also under the independent multiplier mode but uses the entire
half DSP block, including the dedicated hardware logic after the pipeline registers to
implement the 36 × 36 bit multiplication operation. This is shown in
The 36-bit multiplier is useful for applications requiring more than 18-bit precision;
for example, for the mantissa multiplication portion of single precision and extended
single precision floating-point arithmetic applications.
Half-DSP Block
signa
signb
+
+
+
Chapter 5: DSP Blocks in Stratix III Devices
© March 2010 Altera Corporation
72
Operational Mode Descriptions
result[ ]
Figure
5–11.