EP2C35F484C8N Altera, EP2C35F484C8N Datasheet - Page 60
![IC CYCLONE II FPGA 35K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2C35F484C8N
Manufacturer Part Number
EP2C35F484C8N
Description
IC CYCLONE II FPGA 35K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C35F484C8N
Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
33216
# I/os (max)
322
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
33216
Ram Bits
483840
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
2076
Family Type
Cyclone II
No. Of I/o's
322
I/o Supply Voltage
3.3V
Operating Frequency Max
320MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1366
EP2C35F484C8N
EP2C35F484C8N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C35F484C8N
Manufacturer:
ALTERA
Quantity:
319
Part Number:
EP2C35F484C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
I/O Structure & Features
Figure 2–27. DDR SDRAM Interfacing
2–48
Cyclone II Device Handbook, Volume 1
PLL
OE
-90˚ Shifted clk
Register
LE
Register
f
clk
LE
GND
V CC
Register
Register
LE
LE
For more information on Cyclone II external memory interfaces, see the
External Memory Interfaces chapter in Volume 1 of the Cyclone II Device
Handbook.
Control Circuitry
Clock Delay
DQS
t
Clock Control
Block
OE
ENOUT
Register
LE
en/dis
Register
LE
DataA
DataB
Dynamic Enable/Disable
ena_register_mode
Circuitry
Register
Register
Global Clock
LE
LE
DQ
Register
Register
LE
LE
Altera Corporation
Register
LE
February 2007
Resynchronizing
to System Clock
Adjacent LAB LEs
Register
Register
LE
LE