EP1C4F324C7 Altera, EP1C4F324C7 Datasheet - Page 62
![IC CYCLONE FPGA 4K LE 324-FBGA](/photos/6/70/67067/544-324-fbga_sml.jpg)
EP1C4F324C7
Manufacturer Part Number
EP1C4F324C7
Description
IC CYCLONE FPGA 4K LE 324-FBGA
Manufacturer
Altera
Series
Cyclone®r
Datasheet
1.EP1C3T144C8.pdf
(106 pages)
Specifications of EP1C4F324C7
Number Of Logic Elements/cells
4000
Number Of Labs/clbs
400
Total Ram Bits
78336
Number Of I /o
249
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-FBGA
Family Name
Cyclone®
Number Of Logic Blocks/elements
4000
# I/os (max)
249
Frequency (max)
320.1MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
4000
Ram Bits
78336
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1043
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1C4F324C7
Manufacturer:
ALTERA32
Quantity:
266
Part Number:
EP1C4F324C7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1C4F324C7N
Manufacturer:
ALTERA
Quantity:
329
Part Number:
EP1C4F324C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Cyclone Device Handbook, Volume 1
Referenced
Documents
Document
Revision History
2–56
Preliminary
May 2008
v1.6
January 2007
v1.5
August 2005
v1.4
February 2005
v1.3
October 2003
v1.2
September
2003 v1.1
May 2003 v1.0
Table 2–15. Document Revision History
Document
Date and
Version
Added document to Cyclone Device Handbook.
Minor textual and style changes. Added
Documents”
●
●
Minor updates.
●
●
●
●
●
Updated LVDS data rates to 640 Mbps from 311 Mbps.
Added document revision history.
Updated
Updated JTAG chain limits. Added test vector information.
Corrected Figure 2-12.
Added a note to Tables 2-17 through 2-21 regarding violating
the setup or hold time.
Updated phase shift information.
Added 64-bit PCI support information.
This chapter references the following document:
■
Table 2–15
Figures
section.
Using PLLs in Cyclone Devices
2–17, 2–18, 2–19, 2–20, 2–21, and 2–32.
shows the revision history for this chapter.
Changes Made
“Referenced
chapter in the Cyclone Device Handbook
Summary of Changes
Altera Corporation
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May 2008