EPF6016TC144-3 Altera, EPF6016TC144-3 Datasheet - Page 20

IC FLEX 6000 FPGA 16K 144-TQFP

EPF6016TC144-3

Manufacturer Part Number
EPF6016TC144-3
Description
IC FLEX 6000 FPGA 16K 144-TQFP
Manufacturer
Altera
Series
FLEX 6000r
Datasheet

Specifications of EPF6016TC144-3

Number Of Logic Elements/cells
1320
Number Of Labs/clbs
132
Number Of I /o
117
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Other names
544-1282

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0
FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 10. LAB Connections to Row & Column Interconnects
20
Each local channel
driven by an LE can
drive four row channels.
At each intersection,
four row channels can
drive column channels.
Row interconnect
drives the local
interconnect.
Local Interconnect
For improved routability, the row interconnect consists of full-length and
half-length channels. The full-length channels connect to all LABs in a
row; the half-length channels connect to the LABs in half of the row. In
addition to providing a predictable, row-wide interconnect, this
architecture provides increased routing resources. Two neighboring LABs
can be connected using a half-length channel, which saves the other half
of the channel for the other half of the row. One-third of the row channels
are half-length channels.
An LE can be driven by any signal
from two local interconnect areas.
Each local channel
driven by an LE can
drive two column
channels.
Each LE FastTrack Interconnect
output can drive six row channels.
LE
LE
Any column channel can
drive six row channels.
Each LE output signal driving
the FastTrack Interconnect can
drive two column channels.
Column Interconnect
Altera Corporation
From Adjacent
Local Interconnect
Row
Interconnect

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