EP1C6T144C7N Altera, EP1C6T144C7N Datasheet - Page 20
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EP1C6T144C7N
Manufacturer Part Number
EP1C6T144C7N
Description
IC CYCLONE FPGA 5980 LE 144-TQFP
Manufacturer
Altera
Series
Cyclone®r
Datasheet
1.EP1C3T144C8.pdf
(106 pages)
Specifications of EP1C6T144C7N
Number Of Logic Elements/cells
5980
Number Of Labs/clbs
598
Total Ram Bits
92160
Number Of I /o
98
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Family Name
Cyclone®
Number Of Logic Blocks/elements
5980
# I/os (max)
98
Frequency (max)
320.1MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
5980
Ram Bits
92160
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1816
EP1C6T144C7N
EP1C6T144C7N
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Cyclone Device Handbook, Volume 1
Figure 2–9. R4 Interconnect Connections
Notes to
(1)
(2)
2–14
Preliminary
C4 interconnects can drive R4 interconnects.
This pattern is repeated for every LAB in the LAB row.
Figure
2–9:
R4 Interconnect
Driving Left
The column interconnect operates similarly to the row interconnect. Each
column of LABs is served by a dedicated column interconnect, which
vertically routes signals to and from LABs, M4K memory blocks, and row
and column IOEs. These column resources include:
■
■
■
Cyclone devices include an enhanced interconnect structure within LABs
for routing LE output to LE input connections faster using LUT chain
connections and register chain connections. The LUT chain connection
allows the combinatorial output of an LE to directly drive the fast input
of the LE right below it, bypassing the local interconnect. These resources
can be used as a high-speed connection for wide fan-in functions from
LE 1 to LE 10 in the same LAB. The register chain connection allows the
register output of one LE to connect directly to the register input of the
next LE in the LAB for fast shift registers. The Quartus II Compiler
automatically takes advantage of these resources to improve utilization
and performance.
interconnects.
LUT chain interconnects within a LAB
Register chain interconnects within a LAB
C4 interconnects traversing a distance of four blocks in an up and
down direction
Adjacent LAB can
Drive onto Another
LAB's R4 Interconnect
Neighbor
LAB
Figure 2–10
Primary
LAB (2)
C4 Column Interconnects (1)
shows the LUT chain and register chain
Neighbor
LAB
R4 Interconnect
Driving Right
Altera Corporation
May 2008