EP1K30QC208-3N Altera, EP1K30QC208-3N Datasheet - Page 84

• Manufacturer Part Number: EP1K30QC208-3N
• Description: IC ACEX 1K FPGA 30K 208-PQFP
• Manufacturer: Altera
• Series: ACEX-1K®r

Specifications of EP1K30QC208-3N

• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 216
• Total Ram Bits: 24576
• Number Of I /o: 147
• Number Of Gates: 119000
• Voltage - Supply: 2.375 V ~ 2.625 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Family Name: ACEX™ 1K
• Number Of Usable Gates: 30000
• Number Of Logic Blocks/elements: 1728
• # I/os (max): 147
• Frequency (max): 200MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 2.5V
• Logic Cells: 1728
• Ram Bits: 24576
• Device System Gates: 119000
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1836; EP1K30QC208-3N

ACEX 1K Programmable Logic Device Family Data Sheet
Device Pin-
Outs
84
Configuration device
Passive serial (PS)
Passive parallel asynchronous (PPA)
Passive parallel synchronous (PPS)
JTAG
Table 59. Data Sources for ACEX 1K Configuration
Configuration Scheme
During initialization, which occurs immediately after configuration, the
device resets registers, enables I/O pins, and begins to operate as a logic
device. Before and during configuration, all I/O pins (except dedicated
inputs, clock, or configuration pins) are pulled high by a weak pull-up
resistor. Together, the configuration and initialization processes are called
command mode; normal device operation is called user mode.
SRAM configuration elements allow ACEX 1K devices to be reconfigured
in-circuit by loading new configuration data into the device. Real-time
reconfiguration is performed by forcing the device into command mode
with a device pin, loading different configuration data, re-initializing the
device, and resuming user-mode operation. The entire reconfiguration
process requires less than 40 ms and can be used to reconfigure an entire
system dynamically. In-field upgrades can be performed by distributing
new configuration files.
Configuration Schemes
The configuration data for an ACEX 1K device can be loaded with one of
five configuration schemes (see
application. An EPC16, EPC2, EPC1, or EPC1441 configuration device,
intelligent controller, or the JTAG port can be used to control the
configuration of a ACEX 1K device, allowing automatic configuration on
system power-up.
Multiple ACEX 1K devices can be configured in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device. Additional
APEX 20K, APEX 20KE, FLEX 10K, FLEX 10KA, FLEX 10KE, ACEX 1K,
and FLEX 6000 devices can be configured in the same serial chain.
See the Altera web site (http://www.altera.com) or the Altera Documen-
tation Library for pin-out information.
EPC16, EPC2, EPC1, or EPC1441 configuration device
BitBlaster or ByteBlasterMV download cables, or serial data
source
Parallel data source
Parallel data source
BitBlaster or ByteBlasterMV download cables, or
microprocessor with a Jam STAPL File or JBC File
Table
59), chosen on the basis of the target
Data Source
Altera Corporation