EP2C5Q208C8 Altera, EP2C5Q208C8 Datasheet - Page 14
![IC CYCLONE II FPGA 5K 208-PQFP](/photos/6/70/67062/544-208-pqfp_sml.jpg)
EP2C5Q208C8
Manufacturer Part Number
EP2C5Q208C8
Description
IC CYCLONE II FPGA 5K 208-PQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C5Q208C8
Number Of Logic Elements/cells
4608
Number Of Labs/clbs
288
Total Ram Bits
119808
Number Of I /o
142
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
Cyclone® II
Number Of Logic Blocks/elements
4608
# I/os (max)
142
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
4608
Ram Bits
119808
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1448
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
EPCOS
Quantity:
12 000
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA
Quantity:
15
Company:
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA74
Quantity:
619
Part Number:
EP2C5Q208C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Logic Elements
Figure 2–1. Cyclone II EP2C20 Device Block Diagram
Logic Elements
2–2
Cyclone II Device Handbook, Volume 1
M4K Blocks
Embedded
Multipliers
IOEs
PLL
PLL
phase-align double data rate (DDR) signals) provide interface support for
external memory devices such as DDR, DDR2, and single data rate (SDR)
SDRAM, and QDRII SRAM devices at up to 167 MHz.
Figure 2–1
The number of M4K memory blocks, embedded multiplier blocks, PLLs,
rows, and columns vary per device.
The smallest unit of logic in the Cyclone II architecture, the LE, is compact
and provides advanced features with efficient logic utilization. Each LE
features:
■
■
■
■
■
■
■
Logic
Array
A four-input look-up table (LUT), which is a function generator that
can implement any function of four variables
A programmable register
A carry chain connection
A register chain connection
The ability to drive all types of interconnects: local, row, column,
register chain, and direct link interconnects
Support for register packing
Support for register feedback
shows a diagram of the Cyclone II EP2C20 device.
Logic
Array
IOEs
IOEs
Logic
Array
Logic
Array
IOEs
PLL
PLL
M4K Blocks
Altera Corporation
February 2007