EP1C3T100C7 Altera, EP1C3T100C7 Datasheet - Page 96

IC CYCLONE FPGA 2910 LE 100-TQFP

EP1C3T100C7

Manufacturer Part Number
EP1C3T100C7
Description
IC CYCLONE FPGA 2910 LE 100-TQFP
Manufacturer
Altera
Series
Cyclone®r
Datasheet

Specifications of EP1C3T100C7

Number Of Logic Elements/cells
2910
Number Of Labs/clbs
291
Total Ram Bits
59904
Number Of I /o
65
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1015

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Cyclone Device Handbook, Volume 1
4–26
Preliminary
Note to
(1)
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
Decrease input delay to
internal cells
Decrease input delay to
input register
Increase delay to output
pin
Table 4–45. Cyclone I/O Standard Output Delay Adders for Slow Slew Rate on Row Pins (Part 2 of 2)
Table 4–46. Cyclone IOE Programmable Delays on Column Pins
EP1C3 devices do not support the PCI I/O standard.
I/O Standard
Parameter
Tables 4–40
through 4–45:
Off
Small
Medium
Large
On
Off
On
Off
On
Setting
Tables 4–46
programmable delays. These delays are controlled with the Quartus II
software options listed in the Parameter column.
-6 Speed Grade
Min
-6 Speed Grade
through
Min
1,390
1,965
1,692
Max
989
802
2,122
2,639
3,057
3,057
4–47
Max
155
155
552
0
0
-7 Speed Grade
Min
show the adder delays for the IOE
-7 Speed Grade
Min
1,598
1,137
2,259
1,945
Max
922
2,543
3,034
3,515
3,515
Max
178
178
634
0
0
-8 Speed Grade
Min
-8 Speed Grade
Min
Altera Corporation
1,807
1,285
2,554
2,199
1,042
Max
2,875
3,430
3,974
3,974
Max
201
201
717
0
0
May 2008
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
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