SI5326C-C-GMR Silicon Laboratories Inc, SI5326C-C-GMR Datasheet - Page 50
SI5326C-C-GMR
Manufacturer Part Number
SI5326C-C-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI5326C-C-GMR.pdf
(72 pages)
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Si5326
Reset value = 0000 0001
50
Register 130.
Name
Type
5:3
Bit
Bit
7
6
2
1
0
PROGRESS
PROGRESS
DIGHOLD-
FOS2_INT
FOS1_INT
Reserved
LOL_INT
CLAT-
Name
CLAT-
VALID
D7
R
DIGHOLD-
CLAT Progress.
Indicates if the last change in the CLAT register has been processed.
0: Coarse skew adjustment not in progress.
1: Coarse skew adjustment in progress.
Digital Hold Valid.
Indicates if the digital hold circuit has enough samples of a valid clock to meet digital hold
specifications.
0: Indicates digital hold history registers have not been filled. The digital hold output
frequency may not meet specifications.
1: Indicates digital hold history registers have been filled. The digital hold output
frequency is valid.
Reserved.
CKIN2 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN2 input.
CKIN1 Frequency Offset Status.
0: Normal operation.
1: Internal frequency offset alarm on CKIN1 input.
PLL Loss of Lock Status.
0: PLL locked.
1: PLL unlocked.
VALID
D6
R
D5
Reserved
Rev. 1.0
D4
R
Function
D3
FOS2_INT
D2
R
FOS1_INT
D1
R
LOL_INT
D0
R
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