GCIXP1250BA 837411 Intel, GCIXP1250BA 837411 Datasheet - Page 77
GCIXP1250BA 837411
Manufacturer Part Number
GCIXP1250BA 837411
Description
Manufacturer
Intel
Datasheet
1.GCIXP1250BA_837411.pdf
(148 pages)
Specifications of GCIXP1250BA 837411
Lead Free Status / Rohs Status
Supplier Unconfirmed
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4.3.5
4.3.5.1
Datasheet
Table 42. Reset Timings Specification
Figure 16. RESET_IN_L Timing Diagram
Reset
Reset Timings Specification
Table 42
1. core_clk is nominally running at 29.491 MHz after a hard reset when PXTAL is 3.6864 MHz.
t
t
t
t
RST
SG
HG
OETK
Symbol
VDD: VDDX, VDDP,
Note 1: Internal signal to the IXP1200.
shows the reset timing specifications for RESET_IN_L and RESET_OUT_L.
RESET_IN#
sram_rst_1
GPIO<3>
[note 1]
TK_OUT
VDD_REF
RESET_IN_L asserted after power
stable.
GPIO[3] setup to reset sample edge.
GPIO[3] hold from reset sample
edge.
TK_OUT hi-z to valid output.
Parameter
t
RST
150
2
9
4
Minimum
Intel
509 PXTAL
®
--
7
Cycles
Maximum
IXP1250 Network Processor
t
sg
Valid
ms
core_clk cycles
core_clk cycles
core_clk cycles
t
oetk
t
ng
Unit
A8556-01
1
1
1
77
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