PEB20571FV31XT Infineon Technologies, PEB20571FV31XT Datasheet - Page 204
PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
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6.2.3.4
PDPR Register
Reset value: E0
PDP(7:0) PCMU Data Prefix
Note: (x) unused bits read as ’0’
Data Sheet
15
7
x
PCMU Data Prefix Register
The data written to this register is read as the most significant byte of every
time slot read by the DSP from the PCMU frame buffers. Can be used for
quick access to the a/µ-law ROM, for conversion of compressed data
(received via the PCM interface) into linear value.
After reset this register contains the MSB of the base address of the a-law-
to-linear ROM table: E0
the PCMU Data Prefix Register should be programmed to E1
H
14
6
x
13
5
x
H
. To enable quick conversion from µ-law to linear,
12
4
x
read/write
PDP(7:0)
187
11
3
x
10
2
x
Register Description
Address: D072
9
1
x
H
.
PEB 20570
PEB 20571
2003-07-31
8
0
x
H
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