S19252PBIDB Applied Micro Circuits Corporation, S19252PBIDB Datasheet - Page 24

• Manufacturer Part Number: S19252PBIDB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S19252PBIDB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

S19252 Data Sheet
Common Output Pin Description
Transmit and Receive Alarm
(TX_RX_ALARM) – Register and
External Pin
The active high LVCMOS transmit and receive alarm
(TX_RX_ALARM) signal indicates an active alarm on
the transmit or the receive output. This output is an
electrical “OR” of all the transmit and receive alarms
[(“NOT” TX_LOCKDET) “OR” (PHERR) “OR” (“NOT”
RX_LOCKDET)]. This output can be accessed through
the serial bus register and through an external
LVCMOS pin.
Built In Self Test Active (BIST_ACTIVE)
– Register
This output indicates that the BIST checker is active
and is progressively checking data. This signal
monitors the RX checker when the RX_BIST_EN is
active and TX checker when TX_BIST_EN is active.
This output is only accessible through the serial bus
register.
Bit Error Rate Count
(BER_COUNT[11:0]) – Register
This output holds the bit error rate being received by
the checker with the exponent being determined by the
BER_SELECT[2:0] input. This signal monitors the RX
checker count when the RX_BIST_EN is active and TX
checker count when TX_BIST_EN is active. This
output is only accessible through the serial bus
register.
Bit Error Rate Overflow
(BER_OVERFLOW) – Register
This output indicates that the BER_COUNT[11:0] has
overflowed
(BER_SELECT[2:0]) needs to be changed. This signal
is active high and is latched high. This signal monitors
the RX checker count when the RX_BIST_EN is active
and TX checker count when TX_BIST_EN is active.
This output is only accessible through the serial bus
register.
24
and
bit
error
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rate
range
select
Terminal Count Monitor
(TERM_COUNT) – Register
This output monitors for the terminal count of the PRBS
checker.
BER_SELECT[2:0] register. See Table 14 for details.
Each transition of this signal indicates that the terminal
count has been reached. This signal is initially set low
upon RSTB or when TX_BIST_EN/RX_BIST_EN are
activated. The TERM_COUNT makes a low to high
transition when the first terminal count is reached. A
transition
BER_COUNT[11:0] register to zero depending upon
the BER_RSTB setting. When BER_RSTB is active
(high), BER_COUNT[11:0] is not reset after each
terminal count, but instead continues to accrue errors.
This output is only accessible through the serial bus
register.
Transmitter Functional
Description
MUX Operation
The S19252 performs the serializing stage in the
processing of a transmit SONET STS-192/10 Gigabit
Ethernet bit serial data stream. It converts the 16-bit
parallel data stream to bit serial format from
9.953 Gbps to 11.3 Gbps. The rate will depend upon
the CSU_REFCLK frequency used. A high-frequency
bit clock is generated from a 155.52 or 622.08 MHz (or
equivalent FEC/10 Gigabit Ethernet rate) frequency
reference by using a clock synthesizer consisting of an
on-chip phase-lock loop circuit with a divider, VCO and
loop filter.
The
on
terminal
TERM_COUNT
count
is
will
set
Revision 5.03
set
by
the
the