S19252PBIDB Applied Micro Circuits Corporation, S19252PBIDB Datasheet - Page 19

• Manufacturer Part Number: S19252PBIDB
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S19252PBIDB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 8:
Post Amplifier Offset Adjust
(PAOFFADJ[9:0]) and Adaptive Post
Amplifier Offset Adjust Enable
(ADAPOFFADJ) – Registers
The Post-Amp Offset Adjust (PAOFFADJ[9:0]) inputs
may be used to compensate for input data signal duty
cycle distortion or asymmetrical noise (for example
EDFA noise). The PAOFFADJ[9:8] control the step
resolution
PAOFFADJ[7:0] control the post-amp offset adjustment
settings (number of steps = 2
portion of the differential data signal may be relatively
offset from the negative by ±78 mV/±39 mV/±28 mV/
±19 mV with a resolution () of 0.6 mV/0.3 mV/
0.22 mV/0.15 mV respectively. See Table 9 for details
of the post-amp offset adjust settings.
The ADAPOFFADJ is an active high input that enables
the adaptive setting of the offset adjust to enhance the
bit error rate. Upon start up with ADAPOFFADJ active,
the default value gets loaded onto the PAOFFADJ[9:8]
registers. The feedback control loop in the S19252 will
find the setting for offset adjustment that yields the best
possible bit error rate. When ADAPOFFADJ is
disabled, PAOFFADJ[9:0] must be externally controlled
to achieve the best possible bit error rate. See Table 10
for details of the adaptive post-amp offset adjust
settings.These inputs are only accessible through the
serial bus registers.
Revision 5.03
The BOLD CELLS denote the device default state. The PHASE_ADJ
inputs is recommended to be set to “010” state for optimal performance.
2
0
0
0
0
1
1
1
1
Phase Adjust Input (PHASE_ADJ)
Phase Adjust Control
() of
1
0
0
1
1
0
0
1
1
the
0
0
1
0
1
0
1
0
1
post-amp
AppliedMicro - Confidential and Proprietary
8
Phase Adjustment
= 256). The positive
-11.0 ps
+8.5 ps
+5.5 ps
+2.5 ps
-2.5 ps
-5.2 ps
-8.0 ps
offset
0 ps
change.
Table 9:
The BOLD CELLS denote the default state. The default state settings
for PAOFFADJ[7:0] may vary from one device to another.
Table 10: Adaptive Post-Amplifier Offset Adjust
The BOLD CELLS denote the default state
7
0
0
0
0
X
1
1
ADAPOFFADJ
PAOFFADJ9
PAOFFADJ[7:0] Settings for Offset Adjustment
PAOFFADJ[9:8] Settings for Resolution/Range
6
0
0
0
0
X
1
1
0
1
0
0
1
1
5
0
0
0
0
X
1
1
Post-Amplifier Offset Adjust
4
0
0
0
0
X
1
1
Inactive. (PAOFFADJ[9:0] must be exter-
nally controlled for offset adjustment)
Active (Set the resolution through PAOF-
FADJ[9:8]. PAOFFADJ[7:0] are adap-
tively controlled to enhance BER)
3
0
0
0
0
X
1
1
PAOFFADJ8
2
0
0
0
0
X
1
1
Adaptive Offset Adjust Control
1
0
0
1
1
X
1
1
0
1
0
1
0
0
1
0
1
X
0
1
254
255


0
1
2
3
S19252 Data Sheet
(-128+*
0.22mV/±28mV
0.15mV/±19mV
0.6mV/±78mV
0.3mV/±39mV
SERDATIN =
Resolution=
-128 *
-127 *
-126 *
-125 *
SERDATIP-
126 *
127 *

/± Range
mV
mV
mV
mV
mV
mV
mV
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