LTC1291DCN8#PBF Linear Technology, LTC1291DCN8#PBF Datasheet - Page 14

IC DATA ACQ SYSTEM 12BIT 8-DIP

LTC1291DCN8#PBF

Manufacturer Part Number
LTC1291DCN8#PBF
Description
IC DATA ACQ SYSTEM 12BIT 8-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of LTC1291DCN8#PBF

Resolution (bits)
12 b
Data Interface
Serial, Parallel
Voltage Supply Source
Single Supply
Voltage - Supply
5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
54KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
5V
Differential Input
Yes
Power Supply Requirement
Single
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
500mW
Differential Linearity Error
±1LSB(Typ)
Integral Nonlinearity Error
±0.75LSB
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
8
Package Type
PDIP N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sampling Rate (per Second)
-
Lead Free Status / Rohs Status
Compliant

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LTC1291
ANALOG CONSIDERATIONS
Grounding
The LTC1291 should be used with an analog ground plane
and single point grounding techniques. Do not use wire
wrapping techniques to breadboard and evaluate the device.
To achieve the optimum performance, use a PC board. The
ground pin (Pin 4) should be tied directly to the ground
plane with minimum lead length. Figure 4 shows an
example of an ideal LTC1291 ground plane for a two-sided
board. Of course this much ground plane will not always
be possible, but users should strive to get as close to this
ideal as possible.
Bypassing
For good performance, V
ripple. Any changes in the V
ground during the conversion cycle can induce error or
noise in the output code. V
below 0.5mV by bypassing the V
analog ground plane with a minimum of 22 F tantalum
capacitor and with leads as short as possible. A 0.1 F
ceramic disk capacitor should also be placed directly
across V
possible. The V
impedance such as that obtained from a voltage regulator
(e.g., LT323A). Figures 5 and 6 show the effects of good
and poor V
14
A
PPLICATI
Figure 4. Example Ground Plane for the LTC1291
CC
ANALOG GROUND
CC
(Pin 8) and GND (Pin 4) as close to the pins as
PLANE
bypassing.
O
CC
U
supply should have a low output
S
1
2
3
4
TANTALUM
I FOR ATIO
CC
CC
U
0.1 F
LTC1291
22 F
noise and ripple can be kept
must be free of noise and
CC
voltage with respect to
LTC1291 F04
8
6
5
7
CC
V
W
CC
pin directly to the
U
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1291 have
capacitive switching input current spikes. These current
spikes settle quickly and do not cause a problem. If large
source resistances are used or if slow settling op amps
drive the inputs, take care to insure the transients caused
by the current spikes settle completely before the
conversion begins.
Minimizing Gain and Offset Error
Because the LTC1291’s reference is taken from the power
supply pin (V
bypassing is important for attaining the best performance
from the A/D converter. Any parasitic resistance in the V
Figure 5. Poor V
Ripple Can Cause A/D Errors
Figure 6. Good V
Noise and Ripple on V
CC
), proper PC board layout and supply
HORIZONTAL: 10 s/DIV
HORIZONTAL: 10 s/DIV
CC
CC
Bypassing. Noise and
Bypassing Keeps
CC
Below 1mV
CS
V
CC
1291fa
CC

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