MAX11212AEUB+ Maxim Integrated Products, MAX11212AEUB+ Datasheet - Page 8

• Manufacturer Part Number: MAX11212AEUB+
• Description: IC ADC 18BIT SRL 120SPS 10UMAX
• Manufacturer: Maxim Integrated Products

Specifications of MAX11212AEUB+

• Number Of Bits: 18
• Sampling Rate (per Second): 120
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 444mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Conversion Rate: 120 SPs
• Resolution: 18 bit
• Interface Type: SPI
• Voltage Reference: 3.6 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.7 V
• Maximum Power Dissipation: 444 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 1.7 V to 3.6 V
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18-Bit, Single-Channel, Ultra-Low Power, Delta-
Sigma ADC with 2-Wire Serial Interface
8
PIN
10
1
2
3
4
5
6
7
8
9
______________________________________________________________________________________
RDY/DOUT
NAME
DVDD
AVDD
REFN
SCLK
REFP
AINN
GND
AINP
CLK
Ground. Ground reference for analog and digital circuitry.
Differential Reference Positive Input. REFP must be more positive than REFN. Connect REFP to a voltage
between AVDD and GND.
Differential Reference Negative Input. REFN must be more negative than REFP. Connect REFN to a voltage
between AVDD and GND.
Negative Fully Differential Analog Input
Positive Fully Differential Analog Input
Analog Supply Voltage. Connect a supply voltage between +2.7V to +3.6V with respect to GND.
Digital Supply Voltage. Connect a digital supply voltage between +1.7V to +3.6V with respect to GND.
Data-Ready Output/Serial-Data Output. This output serves a dual function. In addition to the serial-data output
function, the RDY/DOUT also indicates that the data is ready when the RDY is logic-low. RDY/DOUT changes
on the falling edge of SCLK.
Serial-Clock Input. Apply an external serial clock to SCLK.
External Clock Signal Input. The internal clock shuts down when CLK is driven by an external clock. Use a
2.4576MHz oscillator (MAX11212A) or a 2.2528MHz oscillator (MAX11212B).
TOP VIEW
REFP
REFN
AINN
AINP
GND
1
2
3
4
5
+
MAX11212
µMAX
FUNCTION
10
9
8
7
6
CLK
SCLK
RDY/DOUT
DVDD
AVDD
Pin Configuration
Pin Description