LTC2208IUP#TR Linear Technology, LTC2208IUP#TR Datasheet - Page 25
![IC ADC 16BIT 130MSPS 64-QFN](/photos/6/63/66316/64-qfn_05-08-1705_sml.jpg)
LTC2208IUP#TR
Manufacturer Part Number
LTC2208IUP#TR
Description
IC ADC 16BIT 130MSPS 64-QFN
Manufacturer
Linear Technology
Datasheet
1.LTC2208CUPPBF.pdf
(32 pages)
Specifications of LTC2208IUP#TR
Number Of Bits
16
Sampling Rate (per Second)
130M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
1.78W
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS INFORMATION
PC BOARD
Figure 14. Descrambling a Scrambled Digital Output
LTC2208
ANALOG
INPUT
CLKOUT
D15/D0
D14/D0
D2/D0
D1/D0
AIN
AIN
D0
OF
+
–
Figure 15. Functional Equivalent Block Diagram of Internal Dither Circuit
LTC2208
CLOCK/DUTY
ENC
FPGA
CONTROL
AMP
S/H
CYCLE
+
ENC
–
•
•
•
D15
D14
D2
D1
D0
2208 F14
PRECISION
PIPELINED
ADC CORE
16-BIT
DAC
Internal Dither
The LTC2208 is a 16-bit ADC with a very linear transfer
function; however, at low input levels even slight imperfec-
tions in the transfer function will result in unwanted tones.
Small errors in the transfer function are usually a result
of ADC element mismatches. An optional internal dither
mode can be enabled to randomize the input location on
the ADC transfer curve, resulting in improved SFDR for
low signal levels.
As shown in Figure 15, the output of the sample-and-hold
amplifi er is summed with the output of a dither DAC. The
dither DAC is driven by a long sequence pseudo-random
number generator; the random number fed to the dither
DAC is also subtracted from the ADC result. If the dither
DAC is precisely calibrated to the ADC, very little of the
dither signal will be seen at the output. The dither signal
that does leak through will appear as white noise. The dither
DAC is calibrated to result in less than 0.5dB elevation in
the noise fl oor of the ADC, as compared to the noise fl oor
with dither off.
SUMMATION
DIGITAL
PSEUDO-RANDOM
LOW = DITHER OFF
HIGH = DITHER ON
MULTIBIT DEEP
DITHER ENABLE
GENERATOR
NUMBER
DRIVERS
OUTPUT
DITH
2208 F15
CLKOUT
D15
OF
D0
•
•
•
LTC2208
25
2208fc