KAD5512P-25Q72 Intersil, KAD5512P-25Q72 Datasheet - Page 4
![IC ADC 12BIT 250MSPS SGL 72-QFN](/photos/6/61/66113/kad5512p-25q72_sml.jpg)
KAD5512P-25Q72
Manufacturer Part Number
KAD5512P-25Q72
Description
IC ADC 12BIT 250MSPS SGL 72-QFN
Manufacturer
Intersil
Series
FemtoCharge™r
Datasheet
1.KAD5512P-25Q72.pdf
(36 pages)
Specifications of KAD5512P-25Q72
Number Of Bits
12
Sampling Rate (per Second)
250M
Data Interface
Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
286mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
72-VFQFN Exposed Pad
For Use With
KDC5512EVAL - DAUGHTER CARD FOR KAD5512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KAD5512P-25Q72
Manufacturer:
Intersil
Quantity:
23
Pin Descriptions - 72 Ld QFN
NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection). SDR is the default state at power-up for
the 72 pin package.
(Exposed Paddle)
PIN NUMBER
PAD
50
51
52
53
54
57
58
59
60
61
62
63
64
66
67
68
69
70
LVDS [LVCMOS] NAME
4
OUTFMT
[D10]
[D11]
D10N
D11N
AVSS
D10P
D11P
SCLK
SDIO
[D6]
[NC]
[D7]
[NC]
[D8]
[NC]
[D9]
[NC]
[NC]
[NC]
[OR]
D7N
D8N
D9N
ORN
SDO
D6P
D7P
D8P
D9P
ORP
CSB
(Continued)
LVDS Bit 6 Output True
[LVCMOS Bit 6]
LVDS Bit 7 Output Complement
[NC in LVCMOS]
LVDS Bit 7 Output True
[LVCMOS Bit 7]
LVDS Bit 8 Output Complement
[NC in LVCMOS]
LVDS Bit 8 Output True
[LVCMOS Bit 8]
LVDS Bit 9 Output Complement
[NC in LVCMOS]
LVDS Bit 9 Output True
[LVCMOS Bit 9]
LVDS Bit 10 Output Complement
[NC in LVCMOS]
LVDS Bit 10 Output True
[LVCMOS Bit 10]
LVDS Bit 11 Output Complement
[NC in LVCMOS]
LVDS Bit 11 Output True
[LVCMOS Bit 11]
LVDS Over Range Complement
[NC in LVCMOS]
LVDS Over Range True
[LVCMOS Over Range]
SPI Serial Data Output
(4.7kΩ pull-up to OVDD is required)
SPI Chip Select (active low)
SPI Clock
SPI Serial Data Input/Output
Tri-Level Output Data Format Control (Two’s
Comp., Gray Code, Offset Binary)
Analog Ground (Connect to a low thermal
impedance analog ground plane with multiple
vias)
KAD5512P
[LVCMOS] FUNCTION SDR MODE
LVDS
DDR MODE COMMENTS
DDR Logical Bits 7, 6
(LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 9, 8
(LVDS)
DDR Logical Bits 9, 8
(LVDS or CMOS)
NC in DDR
NC in DDR
DDR Logical Bits 11, 10
(LVDS)
DDR Logical Bits 11, 10
(LVDS or CMOS)
NC in DDR
NC in DDR
October 1, 2010
FN6807.4