PI6C3991JE Pericom Semiconductor, PI6C3991JE Datasheet - Page 7
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PI6C3991JE
Manufacturer Part Number
PI6C3991JE
Description
IC PROG SKEW CLOCK DRIVER 32PLCC
Manufacturer
Pericom Semiconductor
Series
SuperClock®r
Type
Clock Bufferr
Datasheet
1.PI6C3991J.pdf
(11 pages)
Specifications of PI6C3991JE
Pll
Yes
Input
LVTTL
Output
LVTTL
Number Of Circuits
1
Ratio - Input:output
5:4
Differential - Input:output
No/No
Frequency - Max
80MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Frequency-max
80MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Operational Mode Descriptions
Figure 2 shows the SuperClock configured as a zero-skew clock
buffer. In this mode the PI6C3991 can be used as the basis for a low-
skew clock distribution tree. When all of the function select inputs
(xF0, xF1) are left open, the outputs are aligned and may each drive
a terminated transmission line to an independent load. The FB input
System Clock
System Clock
Figure 2. Zero-Skew and/or Zero-Delay Clock Driver
FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
Figure 3. Programmable Skew Clock Driver
FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
LENGTH: L1 = L2, L3 < L2 by 6", L4 > L2 by 6"
REF
7
REF
can be tied to any output in this configuration and the operating
frequency range is selected with the FS pin. The low-skew specifi-
cation, coupled with the ability to drive terminated transmission lines
(with impedances as low as 50 Ohm), allows efficient printed circuit
board design.
3.3V High-Speed, Low-Voltage Programmable
LENGTH: L1 = L2 = L3 = L4
L1
L2
L3
L4
L1
L2
L3
L4
Z
Z
Z
Z
0
0
0
0
Z
Z
Z
Z
Skew Clock Buffer - SuperClock
0
0
0
0
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
PS8450C
PI6C3991
08/15/02