IDT5V49EE702NDGI8 IDT, Integrated Device Technology Inc, IDT5V49EE702NDGI8 Datasheet - Page 21

• Manufacturer Part Number: IDT5V49EE702NDGI8
• Description: IC PLL CLK GEN 200MHZ 28VQFN
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Generator, Multiplexerr

Specifications of IDT5V49EE702NDGI8

• Pll: Yes with Bypass
• Input: LVCMOS, LVTTL, Crystal
• Output: HCSL, LVCMOS, LVDS, LVPECL, LVTTL
• Number Of Circuits: 1
• Ratio - Input:output: 2:7
• Differential - Input:output: No/Yes
• Frequency - Max: 500MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Frequency-max: 500MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: IDT5V49EE702DLGI8; IDT5V49EE702DLGI8

AC Timing Electrical Characteristics
(Spread Spectrum Generation = OFF)
IDT® EEPROM PROGRAMMABLE CLOCK GENERATOR
Symbol
IDT5V49EE702
EEPROM PROGRAMMABLE CLOCK GENERATOR
1 / t1
f
f
f
f
t4
VCO
PFD
IN
BW
t2
t3
t5
2
1
Input Frequency
Output Frequency
VCO Frequency
PFD Frequency
Loop Bandwidth
Input Duty Cycle
Output Duty Cycle
Slew Rate, SLEW[1:0] = 00
Slew Rate, SLEW[1:0] = 01
Slew Rate, SLEW[1:0] = 10
Slew Rate, SLEW[1:0] = 11
Rise Times
Fall Times
Rise Times
Fall Times
Rise Times
Fall Times
Parameter
Input frequency limit (CLKIN)
Input frequency limit (XIN/REF)
Single ended clock output limit (LVTTL)
Differential cock output limit (LVPECL/
LVDS/HCSL)
VCO operating frequency range
PFD operating frequency range
Based on loop filter resistor and capacitor
values
Duty Cycle for input
Measured at V
Reference output
Measured at V
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of V
(Output Load = 15 pF)
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of V
(Output Load = 15 pF)
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of V
(Output Load = 15 pF)
Single-ended 3.3V LVCMOS output clock rise
and fall time, 20% to 80% of V
(Output Load = 15 pF)
LVDS, 20% to 80%
LVDS, 80% to 20%
LVPECL, 20% to 80%
LVPECL, 80% to 20%
HCSL, From 0.175 V to 0.525 V
HCSL, From 0.525 V to 0.175 V
Test Conditions
DD
DD
21
/2, all outputs except
/2, Reference output
DD
DD
DD
DD
0.001
0.001
Min.
0.5
0.01
175
175
100
40
45
40
1
8
1
IDT5V49EE702
CLOCK SYNTHESIZER
Typ.
2.75
1.25
400
400
600
600
600
600
3.5
2
Max.
1200
700
700
200
100
200
500
100
10
60
55
60
REV F 022310
Units
MHz
MHz
MHz
MHz
MHz
MHz
V/ns
ps
ps
ps
%
%
%