CY2305CSXC-1H Cypress Semiconductor Corp, CY2305CSXC-1H Datasheet

IC CLK ZDB 5OUT 133MHZ 8SOIC

CY2305CSXC-1H

Manufacturer Part Number
CY2305CSXC-1H
Description
IC CLK ZDB 5OUT 133MHZ 8SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Zero Delay Bufferr
Datasheet

Specifications of CY2305CSXC-1H

Number Of Circuits
1
Package / Case
8-SOIC (3.9mm Width)
Pll
Yes
Input
LVCMOS, LVTTL
Output
LVCMOS
Ratio - Input:output
1:5
Differential - Input:output
No/No
Frequency - Max
133.33MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
133MHz
Output Frequency Range
10 MHz to 133.33 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2194-5
CY2305CSXC-1H

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2305CSXC-1H
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY2305CSXC-1HT
Manufacturer:
ABC
Quantity:
84 000
Part Number:
CY2305CSXC-1HT
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
CY2305CSXC-1HT
Quantity:
2 495
Features
Functional Description
The CY2305C and CY2309C are die replacement parts for
CY2305 and CY2309.
The CY2309C is a low-cost 3.3 V zero delay buffer designed to
distribute high speed clocks and is available in a 16-pin SOIC or
TSSOP package. The CY2305C is an 8-pin version of the
CY2309C. It accepts one reference input and drives out five low
skew clocks. The -1H versions of each device operate up to
Cypress Semiconductor Corporation
Document Number: 38-07672 Rev. *K
Logic Block Diagram for CY2305C
10 MHz to 100–133 MHz operating range
Zero input and output propagation delay
Multiple low skew outputs
One input drives five outputs (CY2305C)
One input drives nine outputs, grouped as 4 + 4 + 1 (CY2309C)
50 ps typical cycle-to-cycle jitter (15 pF, 66 MHz)
Test mode to bypass phase locked loop (PLL) (CY2309C) only,
see
Available in space saving 16-pin 150 Mil small outline
integrated circuit (SOIC) or 4.4 mm thin shrunk small outline
package (TSSOP) packages (CY2309C), and 8-pin, 150 Mil
SOIC package (CY2305C)
3.3 V operation
Commercial, industrial and automotive-A flows available
Select Input Decoding for CY2309C on page 5
REF
198 Champion Court
PLL
100–133 MHz frequencies and have higher drive than the -1
devices. All parts have on-chip phase locked loops (PLLs) which
lock to an input clock on the REF pin. The PLL feedback is
on-chip and is obtained from the CLKOUT pad.
The CY2309C has two banks of four outputs each that are
controlled by the select inputs as shown in the
Decoding for CY2309C on page
required, Bank B is three-stated. The input clock is directly
applied to the outputs by the select inputs for chip and system
testing purposes.
The CY2305C and CY2309C PLLs enter a power down mode
when there are no rising edges on the REF input. In this state,
the outputs are three-stated and the PLL is turned off. This
results in less than 12.0 A of current draw for commercial
temperature devices and 25.0 A for industrial and automotive-A
temperature parts. The CY2309C PLL shuts down in one
additional case as shown in the
CY2309C on page 5.
In the special case when S2:S1 is 1:0, the PLL is bypassed and
REF is output from DC to the maximum allowable frequency. The
part behaves as a non-zero delay buffer in this mode and the
outputs are not three-stated.
The CY2305C or CY2309C is available in two or three different
configurations as shown in the
The CY2305C-1 or CY2309C-1 is the base part. The CY2305-1H
or CY2309-1H is the high drive version of the -1. Its rise and fall
times are much faster than the -1.
3.3 V Zero Delay Clock Buffer
San Jose
CLKOUT
CLK1
CLK2
CLK3
CLK4
,
CA 95134-1709
Ordering Information on page
5. If all output clocks are not
Select Input Decoding for
Revised February 3, 2011
CY2305C
CY2309C
408-943-2600
Select Input
11.
[+] Feedback

Related parts for CY2305CSXC-1H

CY2305CSXC-1H Summary of contents

Page 1

... CY2309C. It accepts one reference input and drives out five low skew clocks. The -1H versions of each device operate up to Logic Block Diagram for CY2305C REF Cypress Semiconductor Corporation Document Number: 38-07672 Rev. *K 3.3 V Zero Delay Clock Buffer 100–133 MHz frequencies and have higher drive than the -1 devices ...

Page 2

Logic Block Diagram for CY2309C REF S2 S1 Document Number: 38-07672 Rev. *K CLKOUT PLL MUX CLKA1 CLKA2 CLKA3 CLKA4 CLKB1 Select Input CLKB2 Decoding CLKB3 CLKB4 CY2305C CY2309C Page [+] Feedback ...

Page 3

... Operating Conditions for CY2305CSXC-XX and CY2309CSXC-XX ............................................................... 6 Operating Conditions for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX ........................... 6 Electrical Characteristics for CY2305CSXC-XX and CY2309CSXC-XX ............................................................... 6 Switching Characteristics for CY2305CSXC-XX and CY2309CSXC-XX ............................................................... 7 Switching Characteristics for CY2305CSXI-XX, CY2305CSXA-XX and CY2309CSXI-XX ........................... 8 Switching characteristics table for CY2305CSXI-1H, Document Number: 38-07672 Rev. *K CY2305CSXA-1H and CY2309CSXI-1H ...

Page 4

Pinouts CY2305C Table 1. Pin Description - 8 Pin SOIC Pin Signal [1] 1 REF [2] 2 CLK2 [2] 3 CLK1 4 GND [2] 5 CLK3 [2] 7 CLK4 [2] 8 CLKOUT CY2309C Figure 2. Pin Diagram ...

Page 5

Table 2. Pin Definition - 16 Pin SOIC/TSSOP (continued) Pin Signal [ [5] 10 CLKB3 [5] 11 CLKB4 12 GND [5] 14 CLKA3 [5] 15 CLKA4 [5] 16 CLKOUT Table 3. Select Input Decoding for ...

Page 6

... Load capacitance, from 100 MHz to 133 MHz L C Input capacitance IN t Power-up time for all V PU (power ramps are monotonic) Electrical Characteristics for CY2305CSXC-XX and CY2309CSXC-XX Electrical characteristics table for CY2305CSXC-XX and CY2309CSXC-XX commercial temperature devices. Parameter Description V Input LOW voltage IL V Input HIGH voltage IH I ...

Page 7

... Output HIGH voltage OH I (PD mode) Power-down supply current DD I Supply current DD Switching Characteristics for CY2305CSXC-XX and CY2309CSXC-XX Switching characteristics table for CY2305CSXC-1 and CY2309CSXC-1 commercial temperature devices. All parameters are specified with loaded outputs. Parameter Name t Output frequency 1 [10] t Output duty cycle ...

Page 8

... Switching Characteristics for CY2305CSXC-XX and CY2309CSXC-XX Switching characteristics table for CY2305CSXC-1H and CY2309CSXC-1H commercial temperature devices. All parameters are specified with loaded outputs. Parameter Name t Output frequency 1  Output duty cycle = t [11 [11] t Rise time 3 [11] t Fall time 4 [11] t Output-to-output skew ...

Page 9

Switching characteristics table for CY2305CSXI-1H, CY2305CSXA-1H and CY2309CSXI-1H Switching characteristics table for CY2305CSXI-1H, CY2305CSXA-1H and CY2309CSXI-1H industrial/automotive-A temperature device. All parameters are specified with loaded outputs. Parameter Name t Output frequency 1 [12  Output duty cycle ] ...

Page 10

OUTPUT OUTPUT INPUT OUTPUT CLKOUT, Device 1 CLKOUT, Device 2 Test Circuits Test Circuit # 0.1  F OUTPUTS V DD 0.1  F GND GND Document Number: 38-07672 Rev. *K Figure 5. Output-Output Skew 1.4 V ...

Page 11

... Mil SOIC CY2305CSXC-1T 8-pin 150 Mil SOIC – Tape and reel CY2305CSXC-1H 8-pin 150 Mil SOIC CY2305CSXC-1HT 8-pin 150 Mil SOIC – Tape and reel CY2305CSXI-1 8-pin 150 Mil SOIC CY2305CSXI-1T 8-pin 150 Mil SOIC – Tape and reel ...

Page 12

Ordering Code Definition CY 230XC XX X – 1X (T) Tape and reel Output Drive standard drive 1H = high drive Temperature Range Automotive C = Commercial I = Industrial Package SOIC, Pb-free ZX ...

Page 13

Package Drawing and Dimensions Document Number: 38-07672 Rev. *K Figure 8. 8-Pin (150 Mil) SOIC SZ08.15 CY2305C CY2309C 51-85066 *D Page [+] Feedback ...

Page 14

Figure 10. 16-Pin TSSOP 4.40 mm Body ZZ16.173 Document Number: 38-07672 Rev. *K Figure 9. 16-Pin (150 Mil) SOIC SZ16.15 CY2305C CY2309C 51-85068 *C 51-85091 *C Page [+] Feedback ...

Page 15

Acronyms Acronym Description CMOS Complementary metal oxide semiconductor PLL phase locked loop SOIC small outline integrated circuit TSSOP thin shrunk small outline package Document Number: 38-07672 Rev. *K Document Conventions Units of Measure Symbol Unit of Measure °C degrees Celsius ...

Page 16

Document History Page Document Title: CY2305C CY2309C 3.3 V ZERO DELAY CLOCK BUFFER Document Number: 38-07672 REV. ECN NO. Issue Date ** 224421 See ECN *A 268571 See ECN *B 276453 See ECN *C 303063 See ECN *D 318315 See ...

Page 17

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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