CY2309SXC-1H Cypress Semiconductor Corp, CY2309SXC-1H Datasheet

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CY2309SXC-1H

Manufacturer Part Number
CY2309SXC-1H
Description
IC CLK ZDB 9OUT 133MHZ 16SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Fanout Distribution, Zero Delay Bufferr
Datasheet

Specifications of CY2309SXC-1H

Number Of Circuits
1
Package / Case
16-SOIC (3.9mm Width)
Pll
Yes with Bypass
Input
LVCMOS, LVTTL
Output
LVCMOS
Ratio - Input:output
1:9
Differential - Input:output
No/No
Frequency - Max
133.33MHz
Divider/multiplier
No/No
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Frequency-max
133MHz
Output Frequency Range
10 MHz to 133.33 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2207-5
CY2309SXC-1H

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY2309SXC-1H
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY2309SXC-1HT
Manufacturer:
CYPRESS
Quantity:
8 000
Part Number:
CY2309SXC-1HT
Quantity:
2 500
Company:
Part Number:
CY2309SXC-1HT
Quantity:
2 308
Features
Logic Block Diagram
Cypress Semiconductor Corporation
Document Number : 38-07140 Rev. *M
Not recommended for new designs. The CY2305C and
CY2309C are form, fit, function compatible devices with
improved specifications.
10 MHz to 100/133 MHz operating range, compatible with CPU
and PCI bus frequencies
Zero input-output propagation delay
60-ps typical cycle-to-cycle jitter (high drive)
Multiple low skew outputs
Compatible with Pentium-based systems
Test Mode to bypass phase-locked loop (PLL) (CY2309)
Packages:
3.3-V operation
Commercial and industrial temperature ranges
85 ps typical output-to-output skew
One input drives five outputs (CY2305)
One input drives nine outputs, grouped as 4 + 4 + 1 (CY2309)
8-pin, 150-mil SOIC package (CY2305)
16-pin 150-mil SOIC or 4.4-mm TSSOP (CY2309)
REF
S2
S1
198 Champion Court
PLL
Select Input
Decoding
Low Cost 3.3-V Zero Delay Buffer
Functional Description
The CY2309 is a low-cost 3.3-V zero delay buffer designed to
distribute high speed clocks and is available in a 16-pin SOIC or
TSSOP package. The CY2305 is an 8-pin version of the
CY2309. It accepts one reference input, and drives out five low
skew clocks. The -1H versions of each device operate at up to
100-/133 MHz frequencies, and have higher drive than the -1
devices. All parts have on-chip PLLs which lock to an input clock
on the REF pin. The PLL feedback is on-chip and is obtained
from the CLKOUT pad.
The CY2309 has two banks of four outputs each, which can be
controlled by the select inputs as shown in
Decoding for CY2309”
required, BankB can be three-stated. The select inputs also
allow the input clock to be directly applied to the outputs for chip
and system testing purposes.
The CY2305 and CY2309 PLLs enter a power-down mode when
there are no rising edges on the REF input. In this state, the
outputs are three-stated and the PLL is turned off, resulting in
less than 25.0 μA current draw for these parts. The CY2309 PLL
shuts down in one additional case as shown in
Decoding for CY2309”
Multiple CY2305 and CY2309 devices can accept the same input
clock and distribute it. In this case, the skew between the outputs
of two devices is guaranteed to be less than 700 ps.
The CY2305/CY2309 is available in two or three different
configurations, as shown in
on page 13. The CY2305-1/CY2309-1 is the base part. The
CY2305-1H/ CY2309-1H is the high-drive version of the -1, and
its rise and fall times are much faster than the -1.
MUX
San Jose
,
CA 95134-1709
on page 4.
CLKOUT
CLKA1
CLKA2
CLKA3
CLKA4
CLKB1
CLKB2
CLKB3
CLKB4
on page 4. If all output clocks are not
“Ordering Information for CY2305”
CY2305, CY2309
Revised January 28, 2011
408-943-2600
“Select Input
“Select Input
[+] Feedback

Related parts for CY2309SXC-1H

CY2309SXC-1H Summary of contents

Page 1

... Commercial and industrial temperature ranges Logic Block Diagram REF S2 S1 Cypress Semiconductor Corporation Document Number : 38-07140 Rev. *M Low Cost 3.3-V Zero Delay Buffer Functional Description The CY2309 is a low-cost 3.3-V zero delay buffer designed to distribute high speed clocks and is available in a 16-pin SOIC or TSSOP package ...

Page 2

Contents Pinouts .............................................................................. 3 Select Input Decoding for CY2309 .................................. 4 Zero Delay and Skew Control.......................................... 4 Absolute Maximum Conditions....................................... 5 Operating Conditions for CY2305SC-XX and CY2309SC-XX Commercial Temperature Devices.................................. 5 Electrical Characteristics for CY2305SC-XX and CY2309SC-XX Commercial Temperature Devices......... ...

Page 3

Pinouts Table 1. Pin Description for CY2305 Pin Signal [1] 1 REF [2] 2 CLK2 [2] 3 CLK1 4 GND 5 [2] CLK3 [2] 7 CLK4 [2] 8 CLKOUT Table 2. Pin Description for CY2309 Pin Signal ...

Page 4

Table 2. Pin Description for CY2309 Pin Signal [4] 14 CLKA3 [4] 15 CLKA4 [4] 16 CLKOUT Select Input Decoding for CY2309 S2 S1 CLOCK A1–A4 CLOCK B1– Three-state 0 1 Driven 1 0 Driven ...

Page 5

Absolute Maximum Conditions Supply voltage to ground potential ...............–0 +7 input voltage (Except REF) .......... –0 input voltage REF ........................................–0 Storage temperature .................................. –65°C to +150°C Operating Conditions ...

Page 6

Switching Characteristics for CY2305SC-1 and CY2309SC-1 Commercial Temperature Devices [9] Parameter Name t Delay, REF rising edge to 6B [8] CLKOUT rising edge [8] t Device-to-device skew 7 [8] t Cycle-to-cycle jitter J [8] t PLL lock time LOCK Switching ...

Page 7

Electrical Characteristics for CY2305SI-XX and CY2309SI-XX Industrial Temperature Devices Parameter Description [10] V Input LOW voltage IL [10] V Input HIGH voltage IH I Input LOW current IL I Input HIGH current IH [11] V Output LOW voltage OL [11] ...

Page 8

Switching Characteristics for CY2305SI-1H and CY2309SI-1H Industrial Temperature Devices [13] Parameter Name t Output frequency 1 ÷ t [14] t Duty cycle = ÷ t [14] t Duty cycle = [14] t ...

Page 9

Switching Waveforms Figure 7. Input-Output Propagation Delay INPUT OUTPUT CLKOUT, Device 1 CLKOUT, Device 2 Document Number : 38-07140 Rev Figure 8. Device-Device Skew ...

Page 10

Typical Duty Cycle [15] and I DD Duty Cycle Vs VDD (for 30 pF Loads over Frequency - 3.3V, 25C 3.1 3.2 3.3 3.4 3.5 VDD (V) Duty ...

Page 11

Typical Duty Cycle [17] and IDD Trends Duty Cycle Vs VDD (for 30 pF Loads over Frequency - 3.3V, 25C 3.1 3.2 3.3 3.4 3.5 VDD (V) Duty ...

Page 12

Test Circuits Test Circuit # CLK 0.1 μ F OUTPUTS V DD 0.1 μ F GND GND Document Number : 38-07140 Rev. *M Test Circuit # 0.1 μ F out C LOAD V DD ...

Page 13

... SOIC CY2309SXI-1 [19] 16-pin 150-mil SOIC – Tape and Reel CY2309SXI-1T [19] 16-pin 150-mil SOIC CY2309SXC-1H [19] 16-pin 150-mil SOIC – Tape and Reel CY2309SXC-1HT [19] 16-pin 150-mil SOIC CY2309SXI-1H [19] 16-pin 150-mil SOIC – Tape and Reel CY2309SXI-1HT [19] 16-pin 4.4-mm TSSOP CY2309ZXC-1H [19] 16-pin 4.4-mm TSSOP – ...

Page 14

Ordering Code Definitions CY 2305 S (X) C – 1 (H) (T) Tape and reel Output Drive standard drive 1H = high drive Temperature Range Commercial I = Industrial Package SOIC, leaded Z = ...

Page 15

Package Drawing and Dimensions Document Number : 38-07140 Rev. *M Figure 9. 8-Pin (150-Mil) SOIC S8 CY2305, CY2309 51-85066 *D Page [+] Feedback ...

Page 16

Figure 11. 16-Pin TSSOP 4.40 MM Body Z16.173 Document Number : 38-07140 Rev. *M Figure 10. 16-Pin (150-Mil) SOIC S16 CY2305, CY2309 51-85068 *C 51-85091 *C Page [+] Feedback ...

Page 17

Acronyms Acronym Description PCI Personal computer interconnect PLL Phase locked loop SDRAM Synchronous dynamic random access memory SOIC Small outline integrated circuit TSSOP Thin small outline package ZDB Zero delay buffer Document Number : 38-07140 Rev. *M CY2305, CY2309 Document ...

Page 18

Document History Page Document Title: CY2305/CY2309 Low Cost 3.3-V Zero Delay Buffer Document Number: 38-07140 Orig. of Submission Rev. ECN Change ** 110249 SZV 10/19/01 *A 111117 CKN 03/01/02 *B 117625 HWT 10/21/02 *C 121828 RBI 12/14/02 *D 131503 RGL ...

Page 19

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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