ICS95V847AG IDT, Integrated Device Technology Inc, ICS95V847AG Datasheet - Page 5

• Manufacturer Part Number: ICS95V847AG
• Description: IC CLOCK DRIVER 2.5V 24-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS95V847AG

• Input: Clock
• Output: Clock
• Frequency - Max: 233MHz
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Frequency-max: 233MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 95V847AG

Notes:
1. Refers to transition on noninverting output in PLL bypass mode.
2.
3. Switching characteristics guaranteed for application frequency range.
4. Static phase offset shifted by design.
0718E—11/24/08
T
Max clock frequency
Application Frequency
Range
Input clock duty cycle
CLK stabilization
Low-to high level
propagation delay time
High-to low level propagation
delay time
Output enable time
Output disable time
Period jitter
Half-period jitter
Input clock slew rate
Output clock slew rate
Cycle to Cycle Jitter
Phase error
Output to Output Skew
Timing Requirements
Switching Characteristics (see note 3)
A
= 0 - 85°C; Supply Voltage A
While the pulse skew is almost constant over frequency, the duty cycle error
increases at higher frequencies. This is due to the formula: duty cycle=t
the cycle (t
PARAMETER
PARAMETER
c
) decreases as the frequency goes up.
1
VDD
t
SYMBOL
SYMBOL
t(jit_hper)
(phase error)
T
freq
T
cyc
freq
T
, V
T
t
t
t
tdis
jit (per)
d
PLH
t
STAB
PLL
t
sl(o)
skew
sl(i)
EN
tin
-T
DD
App
op
1
1
cyc
= 2.5 V +/- 0.2V (unless otherwise stated)
4
2.5V+0.2V @ 25
2.5V+0.2V @ 25
CLK_IN to any output
CLK_IN to any output
PD# to any output
PD# to any output
100MHz to 200MHz
100MHz to 200MHz
100MHz to 200MHz
CONDITIONS
CONDITION
5
o
o
C
C
wH
MIN
45
95
40
/t
MIN
-30
-75
-50
c
1
1
, where
MAX
233
210
60
15
TYP
5.5
5.5
5
5
0
UNITS
MHz
MHz
ICS95V847
µs
%
MAX
2.5
30
30
60
50
60
4
UNITS
V/ns
V/ns
ns
ns
ns
ns
ps
ps
ps
ps
ps