ICS95V847AG IDT, Integrated Device Technology Inc, ICS95V847AG Datasheet - Page 2

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ICS95V847AG

Manufacturer Part Number
ICS95V847AG
Description
IC CLOCK DRIVER 2.5V 24-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS95V847AG

Input
Clock
Output
Clock
Frequency - Max
233MHz
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Frequency-max
233MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
95V847AG

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Pin Descriptions
ICS95V847
This PLL Clock Buffer is designed for a V
ICS95V847 is a zero delay buffer that distributes a differential clock input pair (CLK_INT, CLK_INC) to five differential
pair of clock outputs (CLKT[4:0], CLKC[4:0]) and one differential pair feedback clock output (FB_OUT, FB_OUTC). The
clock outputs are controlled by input clock (CLK_INT, CLK_INC), the feedback clock (FB_INT, FB_INC) and the analog
power input (AV
The PLL in ICS95V847 clock driver uses the input clock (CLK_INC, CLK_INT) and the feedback clock (FB_INT,
FB_INC) to provide high-performance, low-skew, low-jitter differential output clocks (CLKT[4:0], CLKC[4:0]). ICS95V847
is also able to track Spread Spectrum Clock (SSC) for reduced EMI.
ICS95V847 is characterized for operation from 0°C to 85°C.
0718E—11/24/08
, 3
, 2
P
N I
1
1
, 5
, 1
, 0
, 1
N
1
1
1
, 4
1
1
1
1
U
, 2
8
9
, 5
, 4
6
7
6
7
9
8
M
1
2
2
2
3
B
0
, 1
, 2
E
2
2
R
DD
4
3
). When AV
G
C
C
C
C
F
F
F
F
V
A
A
B
B
B
B
V
D
G
L
L
L
L
N
_
_
_
_
K
K
K
D
K
D
N
P
D
O
O
N I
N I
[ C
_
_
[ T
D
N I
D
N I
N I
U
U
T
C
: 0
: 0
T
T
T
C
N
] 4
] 4
T
C
DD
A
M
is grounded, the PLL is turned off and bypassed for test purposes.
E
T
P
P
P
P
O
O
O
O
Y
DD
W
W
W
W
N I
N I
N I
N I
U
U
U
U
P
T
T
T
T
R
R
R
R
E
of 2.5V, an AV
P
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g
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