ICS9LPRS525AGILF IDT, Integrated Device Technology Inc, ICS9LPRS525AGILF Datasheet - Page 13

no-image

ICS9LPRS525AGILF

Manufacturer Part Number
ICS9LPRS525AGILF
Description
IC CK505 VREG/RES 56TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Generatorr
Datasheet

Specifications of ICS9LPRS525AGILF

Input
Crystal
Output
Clock
Frequency - Max
400MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Frequency-max
400MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1932

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS9LPRS525AGILF
Manufacturer:
IDT
Quantity:
92
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the beginning byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
IDT
ICS9LPRS525
PC MAIN CLOCK
Byte N + X -1
TM
WR
T
P
PC MAIN CLOCK
Beginning Byte N
Data Byte Count = X
Slave Address D2
Beginning Byte = N
Controller (Host)
Byte N + X - 1
Index Block Write Operation
General SMBus serial interface information for the ICS9LPRS525
starT bit
stoP bit
WRite
(H)
ICS (Slave/Receiver)
ACK
ACK
ACK
ACK
ACK
(H)
13
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each byte
• Controller (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
WR
RT
RD
N
T
P
Slave Address D2
Slave Address D3
Beginning Byte = N
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ACK
ACK
ACK
1484C—04/20/10
(H)
(H)
(H)

Related parts for ICS9LPRS525AGILF