LFXP2-8E-7TN144C LATTICE SEMICONDUCTOR, LFXP2-8E-7TN144C Datasheet - Page 24
LFXP2-8E-7TN144C
Manufacturer Part Number
LFXP2-8E-7TN144C
Description
FPGA LatticeXP2 Family 8000 Cells Flash Technology 1.2V 144-Pin TQFP
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFXP2-40E-5FN484I.pdf
(92 pages)
Specifications of LFXP2-8E-7TN144C
Package
144TQFP
Family Name
LatticeXP2
Device Logic Units
8000
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
100
Ram Bits
226304
Re-programmability Support
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-8E-7TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
MAC sysDSP Element
In this case, the two operands, A and B, are multiplied and the result is added with the previous accumulated value.
This accumulated value is available at the output. The user can enable the input and pipeline registers but the out-
put register is always enabled. The output register is used to store the accumulated value. The Accumulators in the
DSP blocks in LatticeXP2 family can be initialized dynamically. A registered overflow signal is also available. The
overflow conditions are provided later in this document. Figure 2-21 shows the MAC sysDSP element.
Figure 2-21. MAC sysDSP
Multiplicand
Multiplier
Signed A
Signed B
Addn
Accumsload
Serial Register B in
n
Input Data
Register B
n
n
SROB
n
Register
Register
Register
Register
Input
Input
Input
Input
m
Input Data
Register A
m
n
SROA
Serial Register A in
m
Register
Register
Register
Register
Pipeline
Pipeline
Pipeline
Pipeline
m
n
2-21
To Accumulator
To Accumulator
To Accumulator
To Accumulator
Multiplier
Register
Pipeline
x
(default)
m+n
Accumulator
CLK (CLK0,CLK1,CLK2,CLK3)
RST(RST0,RST1,RST2,RST3)
CE (CE0,CE1,CE2,CE3)
LatticeXP2 Family Data Sheet
m+n+16
(default)
Preload
(default)
m+n+16
Architecture
Output
Overflow
signal
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