LFEC3E-3FN256C LATTICE SEMICONDUCTOR, LFEC3E-3FN256C Datasheet - Page 137
![no-image](/images/manufacturer_photos/0/3/381/lattice_semiconductor_sml.jpg)
LFEC3E-3FN256C
Manufacturer Part Number
LFEC3E-3FN256C
Description
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-3FN256C
Package
256FBGA
Family Name
LatticeEC
Device Logic Units
3100
Maximum Internal Frequency
340 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
160
Ram Bits
56320
In System Programmability
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-3FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LFECP/EC20, LFECP/EC33 Logic Signal Connections: 672 fpBGA (Cont.)
Number
GND
GND
G26
G25
G21
G22
G24
G23
Ball
K25
H26
H25
K21
K22
K20
K23
K24
H22
F26
E26
E25
F25
H23
H24
H21
D26
D25
F21
C26
C25
F24
F23
L24
J25
J26
J24
J20
J21
J22
J23
-
-
-
Function
PR17A
PR16B
PR16A
PR15B
PR15A
PR14B
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
GND2
GND2
PR9B
PR9A
PR8B
PR8A
PR7B
PR7A
PR6B
PR6A
PR5B
PR5A
PR4B
PR4A
PR3B
PR3A
Ball
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
-
LFEC20/LFECP20
Bank LVDS
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
RUM0_PLLC_FB_A
RUM0_PLLT_FB_A
RUM0_PLLC_IN_A
RUM0_PLLT_IN_A
Dual Function
RDQS6
4-71
Number
GND
GND
GND
GND
GND
Ball
K25
H26
H25
K21
K22
K20
K23
K24
H22
G26
E26
E25
G25
H23
H24
H21
G21
D26
D25
G22
G24
G23
C26
C25
L24
F26
F25
F21
F24
F23
J25
J26
J24
J20
J21
J22
J23
Function
PR29A
PR28B
PR28A
PR27B
PR27A
PR26B
PR26A
PR25B
PR25A
PR24B
PR24A
PR23B
PR23A
PR22B
PR22A
PR21B
PR21A
PR20B
PR20A
PR19B
PR19A
PR17B
PR17A
PR16B
PR16A
PR15B
PR15A
PR14B
PR14A
PR13B
PR13A
PR12B
PR12A
PR11B
PR11A
GND2
GND2
GND2
GND2
GND2
PR9B
PR9A
Ball
LatticeECP/EC Family Data Sheet
LFECP/EC33
Bank
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
LVDS
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Pinout Information
RUM0_PLLC_FB_A
RUM0_PLLT_FB_A
RUM0_PLLC_IN_A
RUM0_PLLT_IN_A
Function
RDQS23
RDQS14
Dual
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